74HC245D(BJ)

74HC245D CMOS Digital Integrated Circuits Silicon Monolithic 74HC245D74HC245D74HC245D74HC245D 1. 1. Functional DescriptionFunctional Description 1. 1. Functional DescriptionFunctional Description Octal Bus Transceiver 2. 2. 2. 2. GeneralGeneralGeneralGeneral The 74HC245D is high speed CMOS OCTAL BUS TRANSCEIVERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. They are intended for two-way asynchronous communication between data busses. The direction of data transmission is determined by the level of the DIR input. The enable input ( G ) can be used to disable the device so that the busses are effectively isolated. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. 3. Features (Note)Features (Note) 3. 3. Features (Note)Features (Note) (1) High speed: t = 10 ns (typ.) at V = 6.0 V pd CC (2) Low power dissipation: I = 4.0 A (max) at T = 25 CC a (3) Balanced propagation delays: t t PLH PHL (4) Wide operating voltage range: V = 2.0 V to 6.0 V CC(opr) Note: Do not apply a signal to any bus terminal when it is in the output mode. Damage may result. All floating (high impedance) bus terminals must have their input levels fixed by means of pull up or pull down resistors. 4. 4. 4. 4. PackagingPackagingPackagingPackaging SOIC20 Start of commercial production 2016-04 2016 Toshiba Corporation 2016-08-04 1 Rev.3.074HC245D 5. 5. 5. 5. Pin AssignmentPin AssignmentPin AssignmentPin Assignment 6. 6. 6. 6. MarkingMarkingMarkingMarking 7. IEC Logic Symbol 7. 7. 7. IEC Logic SymbolIEC Logic SymbolIEC Logic Symbol 2016 Toshiba Corporation 2016-08-04 2 Rev.3.0