1.6 mm Si8429DB www.vishay.com Vishay Siliconix P-Channel 1.2 V (G-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET power MOSFET a V (V) R ) ()I (A) Q (TYP.) DS DS(on D g Industry first 1.2 V rated MOSFET 0.035 at V = -4.5 V -11.7 GS Ultra small MICRO FOOT chipscale packaging 0.042 at V = -2.5 V -10.7 GS reduces footprint area, profile (0.62 mm) and -8 0.052 at V = -1.8 V -9.6 21 nC GS on-resistance per footprint area 0.069 at V = -1.5 V -8.3 GS Material categorization: for definitions of compliance 0.098 at V = -1.2 V -1.02 GS please see www.vishay.com/doc 99912 MICRO FOOT 1.6 x 1.6 APPLICATIONS S D 2 Low threshold load switch for D 3 portable devices - Low power consumption G - Increased battery life 1 G 4 Ultra low voltage load switch 1 S Backside View Bump Side View D Marking: 8429 Ordering Information: P-Channel MOSFET Si8429DB-T1-E1 (lead (Pb)-free and halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A PARAMETER SYMBOL LIMITUNIT Drain-Source Voltage V -8 DS V Gate-Source Voltage V 5 GS T = 25 C -11.7 C T = 70 C -9.4 C Continuous Drain Current (T = 150 C) I J D b, c T = 25 C -7.8 A b, c T = 70 C -6.3 A A Pulsed Drain Current I -25 DM T = 25 C -5.7 C Continuous Source-Drain Diode Current I S b, c T = 70 C -2.5 C T = 25 C 6.25 A T = 70 C 4 A Maximum Power Dissipation P W D b, c T = 25 C 2.77 C b, c T = 70 C 1.77 C Operating Junction and Storage Temperature Range T , T -55 to +150 J stg C d Package Reflow Conditions IR / convection 260 Notes a. Based on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. Refer to IPC / JEDEC (J-STD-020), no manual or hand soldering. e. In this document, any reference to the case represents the body of the MICRO FOOT device and foot is the bump. THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP.MAX.UNIT a, b Maximum Junction-to-Ambient R 35 45 thJA C/W Maximum Junction-to-Foot (Drain) Steady state R 16 20 thJF Notes a. Surface mounted on 1 x 1 FR4 board. b. Maximum under steady state conditions is 85 C/W. S15-1692-Rev. E, 20-Jul-15 Document Number: 74399 1 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000 8429 xxx 1.6 mmSi8429DB www.vishay.com Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J PARAMETER SYMBOL TEST CONDITIONS MIN.TYP.MAX.UNIT Static Drain-Source Breakdown Voltage V V = 0 V, I = -250 A -8 - - V DS GS D V /T DS J V Temperature Coefficient --7.5 - DS I = -250 A mV/C D V Temperature Coefficient V /T --2.2- GS(th) GS(th) J V = V , I = -250 A -0.35 - -0.8 DS GS D Gate-Source Threshold Voltage V V GS(th) V = V , I = -5 mA - -0.6 - DS GS D Gate-Source Leakage I V = 0 V, V = 5 V - - 100 nA GSS DS GS V = 8 V, V = 0 V - - -1 DS GS Zero Gate Voltage Drain Current I A DSS V = -8 V, V = 0 V, T = 70 C - - -10 DS GS J a On-State Drain Current I V 5 V, V = -4.5 V -5 - - A D(on) DS GS V = -4.5 V, I = -1 A - 0.029 0.035 GS D V = -2.5 V, I = -1 A - 0.035 0.042 GS D a Drain-Source On-State Resistance R V = -1.8 V, I = -1 A - 0.043 0.052 DS(on) GS D V = -1.5 V, I = -1 A - 0.051 0.069 GS D V = -1.2 V, I = -1 A - 0.065 0.098 GS D a Forward Transconductance g V = -4 V, I = -1 A - 0.7 1.2 S fs DS D b Dynamic Input Capacitance C - 1640 - iss Output Capacitance C V = -4 V, V = 0 V, f = 1 MHz - 590 - pF oss DS GS Reverse Transfer Capacitance C - 380 - rss V = -4 V, V = -5 V, I = -1 A - 24 26 DS GS D Total Gate Charge Q g -21 32 nC Gate-Source Charge Q -1.8- gs V = -4 V, V = -4.5 V, I = 1 A DS GS D Q gd Gate-Drain Charge -3.7 - Gate Resistance R V = -0.1 V, f = 1 MHz - 22 - g GS Turn-On Delay Time t -12 20 d(on) Rise Time t -25 40 r V = -4 V, R = 4 DD L ns I -1 A, V = -4.5 V, R = 6 Turn-Off Delay Time t -D GEN g 260390 d(off) Fall Time t - 155 240 f Drain-Source Body Diode Characteristics Continuous Source-Drain Diode I T = 25 C - - -2.5 S C Current A Pulse Diode Forward Current I -- -25 SM Body Diode Voltage V I = -1 A, V = 0 V - -0.7 -1.1 V SD S GS Body Diode Reverse Recovery Time t - 150 250 ns rr Body Diode Reverse Recovery Charge Q - 150 230 nC rr I = -1 A, dI/dt = 100 A/s, T = 25 C F J Reverse Recovery Fall Time t -57- a ns -93- Reverse Recovery Rise Time t b Notes a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. S15-1692-Rev. E, 20-Jul-15 Document Number: 74399 2 For technical questions, contact: pmostechsupport vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000