New Product SiRA02DP Vishay Siliconix N-Channel 30 V (D-S) MOSFET FEATURES PRODUCT SUMMARY TrenchFET Gen IV Power MOSFET a, g V (V) R () (Max.) Q (Typ.) I (A) DS DS(on) g D 100 % R and UIS Tested g 0.00200 at V = 10 V 50 Material categorization: GS 30 34.3 nC For definitions of compliance please see 0.00270 at V = 4.5 V 50 GS www.vishay.com/doc 99912 APPLICATIONS PowerPAK SO-8 D Synchronous Rectification High Power Density DC/DC S 6.15 mm 5.15 mm VRMs and Embedded DC/DC 1 S 2 S 3 G G 4 D 8 D 7 D S 6 D N-Channel MOSFET 5 Bottom View Ordering Information: SiRA02DP-T1-GE3 (Lead (Pb)-free and Halogen-free) ABSOLUTE MAXIMUM RATINGS (T = 25 C, unless otherwise noted) A Parameter Symbol LimitUnit Drain-Source Voltage V 30 DS V V Gate-Source Voltage + 20, - 16 GS g T = 25 C C 50 g T = 70 C C 50 Continuous Drain Current (T = 150 C) I J D b, c T = 25 C A 37.3 b, c T = 70 C A 29.8 A I Pulsed Drain Current (t = 300 s) 100 DM g T = 25 C C 45 Continuous Source-Drain Diode Current I S b, c T = 25 C A 4.5 I Single Pulse Avalanche Current 30 AS L = 0.1 mH E mJ Single Pulse Avalanche Energy 45 AS T = 25 C 71.4 C T = 70 C 45.7 C Maximum Power Dissipation P W D b, c T = 25 C A 5 b, c T = 70 C A 3.2 T , T Operating Junction and Storage Temperature Range - 55 to 150 J stg C d, e Soldering Recommendations (Peak Temperature) 260 THERMAL RESISTANCE RATINGS Parameter Symbol TypicalMaximumUnit b, f t 10 s R 20 25 Maximum Junction-to-Ambient thJA C/W Maximum Junction-to-Case (Drain) Steady State R 1.4 1.75 thJC Notes: a. Based on T = 25 C. C b. Surface mounted on 1 x 1 FR4 board. c. t = 10 s. d. See solder profile (www.vishay.com/doc 73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under steady state conditions is 70 C/W. g. Package limited. For technical questions, contact: pmostechsupport vishay.com Document Number: 63773 www.vishay.com S12-3075-Rev. B, 24-Dec-12 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000New Product SiRA02DP Vishay Siliconix SPECIFICATIONS (T = 25 C, unless otherwise noted) J Parameter Symbol Test Conditions Min. Typ.Max.Unit Static Drain-Source Breakdown Voltage V V = 0 V, I = 250 A 30 V DS GS D V Temperature Coefficient V /T 18 DS DS J I = 250 A mV/C D V Temperature Coefficient V /T - 5.7 GS(th) GS(th) J V V = V , I = 250 A Gate-Source Threshold Voltage 1.1 2.2 V GS(th) DS GS D I V = 0 V, V = + 20, - 16 V Gate-Source Leakage 100 nA GSS DS GS V = 30 V, V = 0 V 1 DS GS I Zero Gate Voltage Drain Current A DSS V = 30 V, V = 0 V, T = 55 C 10 DS GS J a I V 5 V, V = 10 V 40 A On-State Drain Current D(on) DS GS V = 10 V, I = 15 A 0.00165 0.00200 GS D a R Drain-Source On-State Resistance DS(on) V = 4.5 V, I = 10 A 0.00215 0.00270 GS D a g V = 10 V, I = 15 A 110 S Forward Transconductance fs DS D b Dynamic C Input Capacitance 6150 iss C Output Capacitance 1615 pF oss V = 15 V, V = 0 V, f = 1 MHz DS GS C Reverse Transfer Capacitance 141 rss C /C Ratio 0.023 0.046 rss iss V = 15 V, V = 10 V, I = 10 A 78 117 DS GS D Q Total Gate Charge g 34.3 52 Q V = 15 V, V = 4.5 V, I = 10 A Gate-Source Charge 13.6 nC gs DS GS D Q Gate-Drain Charge 4.1 gd Output Charge Q V = 15 V, V = 0 V 47.8 oss DS GS R Gate Resistance f = 1 MHz 0.3 1.05 2.1 g t Turn-On Delay Time 16 32 d(on) Rise Time t 10 20 r V = 15 V, R = 1.5 DD L I 10 A, V = 10 V, R = 1 t Turn-Off Delay Time D GEN g 42 80 d(off) Fall Time t 816 f ns t Turn-On Delay Time 31 60 d(on) t Rise Time V = 15 V, R = 1.5 18 35 r DD L I 10 A, V = 4.5 V, R = 1 Turn-Off Delay Time t 38 75 D GEN g d(off) t Fall Time 10 20 f Drain-Source Body Diode Characteristics I T = 25 C Continuous Source-Drain Diode Current 45 S C A a I 100 Pulse Diode Forward Current SM Body Diode Voltage V I = 5 A 0.73 1.1 V SD S t Body Diode Reverse Recovery Time 51 100 ns rr Q Body Diode Reverse Recovery Charge I = 10 A, dI/dt = 100 A/s, 46 90 nC rr F T = 25 C t Reverse Recovery Fall Time J 25 a ns t Reverse Recovery Rise Time 26 b Notes: a. Pulse test pulse width 300 s, duty cycle 2 %. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. For technical questions, contact: pmostechsupport vishay.com www.vishay.com Document Number: 63773 2 S12-3075-Rev. B, 24-Dec-12 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc 91000