A3968 Dual Full-Bridge PWM Motor Driver with Brake Pre-End-of-Life This device is in production, however, it has been deemed Pre-End of Life. The product is approaching end of life. Within a minimum of 6 months, the device will enter its final, Last Time Buy, order phase. Date of status change: December 5, 2018 Recommended Substitutions: For existing customer transition, and for new customers or new appli- cations, contact Allegro Sales. NOTE: For detailed information on purchasing options, contact your local Allegro field applications engineer or sales representative. Allegro MicroSystems, LLC reserves the right to make, from time to time, revisions to the anticipated product life cycle plan for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no respon- sibility for its use nor for any infringements of patents or other rights of third parties which may result from its use.+ A3968 Dual Full-Bridge PWM Motor Driver Features and Benefits Description 650 mA continuous output current The A3968 bidirectionally controls two DC motors. The device 30 V output voltage rating includes two full-bridges capable of continuous output currents Internal fixed-frequency PWM current control of 650 mA and operating voltages to 30 V. Motor winding Satlington sink drivers current can be controlled by the internal fixed-frequency, Brake mode pulse-width modulated (PWM), current-control circuitry. The User-selectable blanking window peak load current limit is set by user selection of a reference Internal ground-clamp and flyback diodes voltage and current-sensing resistors. Internal thermal-shutdown circuitry The fixed-frequency pulse duration is set by a user-selected Crossover-current protection and UVLO protection external RC timing network. The capacitor in the RC timing network also determines a user-selectable blanking window that prevents false triggering of the PWM current-control circuitry during switching transitions. To reduce on-chip power dissipation, the full-bridge power outputs have been optimized for low saturation voltages. The Package: 16 pin SOIC (suffix LB) sink drivers feature the Allegro patented Satlington output structure. The Satlington outputs combine the low voltage drop of a saturated transistor and the high peak current capability of a Darlington. For each bridge, the INPUT and INPUT terminals determine A B the load-current polarity by enabling the appropriate source and sink driver pair. When a logic low is applied to both INPUTs Not to scale Continued on the next page Typical Application MOTOR MOTOR 1 2 16 1 V BB INPUT INPUT 2 15 1A 2A INPUT INPUT 3 14 1B 2B LOGIC LOGIC 4 13 0.5 0.5 5 12 +5 V 6 11 +24 V V BB +5 V 7 V 10 CC V 89RC REF 47F Dwg. EP-047-6 29319.29, Rev. 9 January 31, 2019 MCO-0000566 39 k 10 k 56 k 680 pF