20-Bit, 1.8 MSPS/1 MSPS/500 kSPS, Easy Drive, Differential SAR ADCs Data Sheet AD4020/AD4021/AD4022 FEATURES GENERAL DESCRIPTION Easy Drive The AD4020/AD4021/AD4022 are high accuracy, high speed, Greatly reduced input kickback low power, 20-bit, Easy Drive, precision successive approximation Input current reduced to 0.5 A/MSPS register (SAR) analog-to-digital converters (ADCs) that operate Enhanced acquisition phase, 77% of cycle time at 1 MSPS from a single power supply, VDD. The reference voltage, V , is REF First conversion accurate, no latency or pipeline delay applied externally and can be set independent of the supply Input span compression for single-supply operation voltage. The AD4020/AD4021/AD4022 power scales linearly Fast conversion allows low SPI clock rates with throughput. Input overvoltage clamp protection sinks up to 50 mA SPI-/QSPI-/MICROWIRE-/DSP-compatible serial interface Easy Drive features reduce both signal chain complexity and power High performance consumption while enabling higher channel density. The reduced Differential analog input range: VREF, VREF from 2.4 V to 5.1 V input current, particularly in high-Z mode, coupled with a long Throughput: 1.8 MSPS/1 MSPS/500 kSPS options signal acquisition phase, eliminates the need for a dedicated INL: 3.1 ppm maximum ADC driver. Easy Drive broadens the range of companion circuitry Guaranteed 20-bit, no missing codes that is capable of driving these ADCs (see Figure 2). SNR: 100.5 dB at fIN = 1 kHz, VREF = 5 V Input span compression eliminates the need to provide a THD: 123 dB at fIN = 1 kHz, 100 dB at fIN = 100 kHz negative supply to the ADC driver amplifier while preserving SINAD: 89 dB at fIN = 900 kHz (see Figure 17) Oversampled dynamic range access to the full ADC code range. The input overvoltage clamp 104 dB for OSR = 2 protects the ADC inputs against overvoltage events, minimizing 131 dB for OSR = 1024 disturbances on the reference pin, and eliminating the need for Low power external protection diodes. Single 1.8 V supply operation with 1.71 V to 5.5 V logic Fast device throughput up to 1.8 MSPS allows users to interface accurately capture high frequency signals and to implement 2.7 mW at 500 kSPS (VDD only) oversampling techniques to alleviate the challenges associated 83 W at 10 kSPS, 15 mW at 1.8 MSPS (total power) with antialias filter designs. Decreased serial peripheral interface 10-lead packages: 3 mm 3 mm LFCSP, 3 mm 4.90 mm MSOP (SPI) clock rate requirements reduce digital input/output power Pin compatible with AD4003/AD4007/AD4011 family consumption, broadens digital host options, and simplifies the Guaranteed operation: 40C to +125C task of sending data across digital isolation. The SPI-compatible APPLICATIONS serial user interface is compatible with 1.8 V, 2.5 V, 3 V, and 5 V Automated test equipment logic by using the separate VIO logic supply. Machine automation 18 Medical equipment 25C HIGH-Z DISABLED, 1.8MSPS 15 Battery-powered equipment 25C HIGH-Z ENABLED, 1.8MSPS 12 Precision data acquisition systems Instrumentation and control systems 9 6 FUNCTIONAL BLOCK DIAGRAM 3 2.5V TO 5V 1.8V 0 10F REF VDD 3 AD4020/AD4021/AD4022 6 VIO V 1.8V TO 5V REF HIGH-Z TURBO 9 SDI V /2 MODE REF MODE IN+ 0 SCK 3-WIRE OR 12 SERIAL 4-WIRE SPI 20-BIT INTERFACE SDO INTERFACE SAR ADC 15 (DAISY V IN REF CNV CHAIN, CS) 5 3 1 1 3 5 STATUS SPAN CLAMP V /2 REF BITS COMPRESSION INPUT DIFFERENTIAL VOLTAGE (V) 0 GND Figure 2. Input Current vs. Input Differential Voltage Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20172021 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners Technical Support www.analog.com 15369-001 INPUT CURRENT (A) 15369-147AD4020/AD4021/AD4022 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Driver Amplifier Choice ........................................................... 22 Applications ....................................................................................... 1 Ease of Drive Features ............................................................... 24 Functional Block Diagram .............................................................. 1 Voltage Reference Input ............................................................ 25 General Description ......................................................................... 1 Power Supply ............................................................................... 25 Revision History ............................................................................... 2 Digital Interface .......................................................................... 26 Specifications ..................................................................................... 4 Register Read/Write Functionality........................................... 28 Timing Specifications .................................................................. 7 Status Bits .................................................................................... 30 Absolute Maximum Ratings ............................................................ 9 CS Mode, 3-Wire Turbo Mode ................................................. 31 Thermal Resistance ...................................................................... 9 CS Mode, 3-Wire Without Busy Indicator ................................. 32 ESD Caution .................................................................................. 9 CS Mode, 3-Wire with Busy Indicator .................................... 33 Pin Configurations and Function Descriptions ......................... 10 CS Mode, 4-Wire Turbo Mode ................................................. 34 Typical Performance Characteristics ........................................... 11 CS Mode, 4-Wire Without Busy Indicator ................................. 35 Terminology .................................................................................... 17 CS Mode, 4-Wire with Busy Indicator .................................... 36 Theory of Operation ...................................................................... 18 Daisy-Chain Mode ..................................................................... 37 Circuit Information .................................................................... 18 Layout Guidelines....................................................................... 38 Converter Operation .................................................................. 19 Evaluating the AD4020/AD4021/AD4022 Performance ...... 38 Transfer Functions...................................................................... 19 Outline Dimensions ....................................................................... 39 Applications Information .............................................................. 20 Ordering Guide .......................................................................... 40 Typical Application Diagrams .................................................. 20 Analog Inputs .............................................................................. 21 REVISION HISTORY 2/2021Rev. B to Rev. C Changes to CS Mode, 3-Wire Turbo Mode Section .................. 31 Changes to Features Section and Applications Section ............... 1 Changes to Figure 58 ...................................................................... 33 Changes to Specifications Section .................................................. 4 CS Changes to Mode, 4-Wire Without Busy Indicator Mode Changed Voltage Range (V ) Parameter, Table 1 to V REF REF Section .............................................................................................. 35 Voltage Range Parameter, Table 1................................................... 5 Changes to CS Mode, 4-Wire With Busy Indicator Mode Changes to V Voltage Range Parameter, Table 1 ..................... 5 REF Section and Figure 64..................................................................... 36 Changed CNV or SDI Low to SDO D17 MSB Valid Delay Changes to Daisy-Chain Mode Section ...................................... 37 ( Mode) Parameter, Table 2 to CNV or SDI Low to SDO D19 CS Updated Outline Dimensions ....................................................... 42 MSB Valid Delay ( Mode) Parameter, Table 2 ......................... 7 CS Changes to Ordering Guide .......................................................... 43 Changes CNV Low to SDO D17 MSB Valid Delay Parameter, 11/2019Rev. A to Rev. B Table 3 to CNV Low to SDO D19 MSB Valid Delay Parameter, Table 3 ................................................................................................ 8 Added AD4021 and AD4022 ............................................ Universal Changes to Figure 35 Caption ....................................................... 16 Added Figure 2 Renumbered Sequentially ................................... 1 Changes to Table 8 .......................................................................... 18 Changes to Features Section and General Description Section ....... 1 Changes to Specifications Section and Table 1 .............................. 4 Changes to Input Overvoltage Clamp Circuit Section .............. 21 Changes to Timing Specifications Section and Table 2 ................ 7 Changes to Driver Amplifier Choice Section and Table 10 ...... 22 Deleted Figure 3 Renumbered Sequentially ................................. 8 Changes to High-Z Mode Section ................................................ 24 Changes to Figure 47, Figure 38, and Power Supply Section .... 25 Changes to Table 3 ............................................................................. 8 Changes to Serial Clock Frequency Requirements Section ...... 26 Added Endnote 2, Table 5 ................................................................ 9 Added Note 1 to Table 13 .............................................................. 27 Changes to Absolute Maximum Ratings Section and Thermal Resistance Section ............................................................................. 9 Changes to Register Read/Write Functionality Section ............ 28 Changes to Figure 4 and Table 7 ................................................... 10 Changes to Status Bits Section ...................................................... 30 Rev. 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