Quad Channel, 16-Bit, Serial Input, 4 mA to 20 mA and Voltage Output DAC, Dynamic Power Control, HART Connectivity Data Sheet AD5755-1 achieved by regulating the voltage on the output driver from 7.4 V FEATURES to 29.5 V using a dc-to-dc boost converter optimized for minimum 16-bit resolution and monotonicity Dynamic power control for thermal management on-chip power dissipation. Each channel has a corresponding Current and voltage output pins connectable to a single CHART pin so that HART signals can be coupled onto the terminal current output of the AD5755-1. Current output ranges: 0 mA to 20 mA, 4 mA to 20 mA, The device uses a versatile 3-wire serial interface that operates or 0 mA to 24 mA at clock rates of up to 30 MHz and is compatible with standard 0.05% total unadjusted error (TUE) maximum SPI, QSPI, MICROWIRE, DSP, and microcontroller Voltage output ranges (with 20% overrange): 0 V to 5 V, 0 V interface standards. The interface also features optional CRC-8 to 10 V, 5 V, and 10 V packet error checking, as well as a watchdog timer that monitors 0.04% total unadjusted error (TUE) maximum activity on the interface. User programmable offset and gain On-chip diagnostics PRODUCT HIGHLIGHTS On-chip reference (10 ppm/C maximum) 1. Dynamic power control for thermal management. 40C to +105C temperature range 2. 16-bit performance. APPLICATIONS 3. Multichannel. Process control 4. HART compliant. Actuator control COMPANION PRODUCTS Programmable logic controllers (PLCs) HART network connectivity Product Family: AD5755, AD5757 HART Modem: AD5700, AD5700-1 GENERAL DESCRIPTION External References: ADR445, ADR02 The AD5755-1 is a quad, voltage and current output digital-to- Digital Isolators: ADuM1410, ADuM1411 analog converter (DAC) that operates with a power supply Power: ADP2302, ADP2303 range from 26.4 V to +33 V. On-chip dynamic power control Additional companion products on the AD5755-1 product page minimizes package power dissipation in current mode. This is FUNCTIONAL BLOCK DIAGRAM AV CC 5.0V AV AV SS DD 15V/0V AGND +15V SW V x BOOST x DV 7.4V TO 29.5V DD DGND DC-TO-DC LDAC CONVERTER SCLK SDIN DIGITAL SYNC I OUT x INTERFACE SDO R + DAC A SET x CLEAR CURRENT AND VOLTAGE CHARTx FAULT OUTPUT RANGE SCALING ALERT GAIN REG A +V SENSE x AD1 OFFSET REG A V OUT x AD0 DAC CHANNEL A REFOUT REFERENCE REFIN DAC CHANNEL B DAC CHANNEL C AD5755-1 DAC CHANNEL D NOTES 1. x = A, B, C, AND D. Figure 1. Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. 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Technical Support www.analog.com 09226-101AD5755-1 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Device Features ............................................................................... 40 Applications ...................................................................................... 1 Output Fault................................................................................ 40 General Description ......................................................................... 1 Voltage Output Short-Circuit Protection ............................... 40 Product Highlights ........................................................................... 1 Digital Offset and Gain Control ............................................... 40 Companion Products ....................................................................... 1 Status Readback During a Write .............................................. 40 Functional Block Diagram .............................................................. 1 Asynchronous Clear .................................................................. 41 Revision History ............................................................................... 3 Packet Error Checking .............................................................. 41 Detailed Functional Block Diagram .............................................. 4 Watchdog Timer ........................................................................ 41 Specifications .................................................................................... 5 Output Alert ................................................................................ 41 AC Performance Characteristics ................................................ 8 Internal Reference ...................................................................... 41 Timing Characteristics ................................................................ 9 External Current Setting Resistor ............................................ 41 Absolute Maximum Ratings ......................................................... 12 HART Connectivity ................................................................... 42 ESD Caution................................................................................ 12 Digital Slew Rate Control .......................................................... 42 Pin Configuration and Function Descriptions .......................... 13 Power Dissipation control ........................................................ 43 Typical Performance Characteristics ........................................... 16 DC-to-DC Converters ............................................................... 43 Voltage Outputs ......................................................................... 16 AI Supply RequirementsStatic .......................................... 44 CC Current Outputs ......................................................................... 20 AICC Supply RequirementsSlewing ...................................... 44 DC-to-DC Block ......................................................................... 24 Applications Information ............................................................. 46 Voltage and Current Output Ranges on the Same Terminal Reference ..................................................................................... 25 ....................................................................................................... 46 General ......................................................................................... 26 Current Output Mode with Internal R ............................... 46 SET Terminology .................................................................................... 27 Precision Voltage Reference Selection .................................... 46 Theory of Operation ...................................................................... 29 Driving Inductive Loads ........................................................... 47 DAC Architecture ...................................................................... 29 Transient Voltage Protection ................................................... 47 Power-On State of the AD5755-1 ............................................ 29 Microprocessor Interfacing ...................................................... 47 Serial Interface ............................................................................ 30 Layout Guidelines ...................................................................... 47 Transfer Function ...................................................................... 30 Galvanically Isolated Interface ................................................. 48 Registers ........................................................................................... 31 Industrial HART Capable Analog Output Application Programming Sequence to Write/Enable the Output Shared VOUT x and IOUT x Pin ..................................................... 49 Correctly ...................................................................................... 32 Outline Dimensions ....................................................................... 50 Changing and Reprogramming the Range ............................. 32 Ordering Guide .......................................................................... 50 Data Registers ............................................................................. 33 Control Registers ........................................................................ 35 Readback Operation .................................................................. 38 Rev. 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