AD7568BSZ

2 LC MOS a Octal 12-Bit DAC AD7568 FUNCTIONAL BLOCK DIAGRAM FEATURES Eight 12-Bit DACs in One Package V V D V C V B V A R A AGND DGND DD REF REF REF REF FB 4-Quadrant Multiplication Separate References AD7568 Single +5 V Supply I A INPUT DAC A OUT1 12 12 DAC A LATCH A LATCH I A OUT2 Low Power: 1 mW R B FB Versatile Serial Interface I B INPUT DAC B OUT1 12 Simultaneous Update Capability 12 DAC B LATCH B LATCH I B OUT2 Reset Function R C FB 44-Pin PQFP and PLCC I C INPUT OUT1 DAC C 12 12 DAC C LATCH C LATCH I C OUT2 APPLICATIONS R D FB Process Control I D INPUT DAC D OUT1 12 12 DAC D LATCH D LATCH I D Automatic Test Equipment OUT2 R E FB General Purpose Instrumentation INPUT I E DAC E OUT1 12 12 DAC E LATCH E LATCH I E OUT2 GENERAL DESCRIPTION R F FB The AD7568 contains eight 12-bit DACs in one monolithic de- INPUT DAC F I F OUT1 12 12 DAC F LATCH F LATCH I F vice. The DACs are standard current output with separate V , OUT2 REF R G FB I , I and R terminals. OUT1 OUT2 FB I G INPUT DAC G OUT1 12 12 DAC G LATCH G LATCH The AD7568 is a serial input device. Data is loaded using I G OUT2 R H FSIN, CLKIN and SDIN. One address pin, A0, sets up a de- FB INPUT DAC H I H OUT1 vice address, and this feature may be used to simplify device 12 12 DAC H LATCH H LATCH I H OUT2 loading in a multi-DAC environment. All DACs can be simultaneously updated using the asynchro- CONTROL LOGIC FSIN + nous LDAC input and they can be cleared by asserting the CLKIN INPUT SHIFT REGISTER asynchronous CLR input. SDIN 12 The AD7568 is housed in a space-saving 44-pin plastic quad V E V G flatpack and 44-lead PLCC. V F V H A0 SDOUT REF REF REF REF LDAC CLR PIN CONFIGURATIONS Plastic Quad Flatpack Plastic Leaded Chip Carrier 645 3 2 1 44 43 42 41 40 7 39 NC 1 PIN 1 IDENTIFIER 33 NC NC NC V C V F 2 32 REF REF V F 8 38 V C REF REF R F 3 31 R CFB FB R F 9 37 R C FB FB I F 4 30 I C OUT1 OUT1 AD7568 PQFP I F 10 36 I C 29 I F 5 AD7568 I C OUT1 OUT1 OUT2 OUT2 TOP VIEW V G 6 28 V B REF Not to ScaleTOP VIEW REF I F 11 35 OUT2 I C AD7568 PLCC OUT2 R G 7 27 R B FB (Not to Scale) FB TOP VIEW V B V G 12 34 REF REF I G 8 26 I BOUT1 OUT1 (Not to Scale) R G 13 33 R B I G 9 25 I B FB FB OUT2 OUT2 V H 10 24 V A I G 14 32 I B REF REF OUT1 OUT1 R H 11 23 R A FB FB I G 15 31 I B OUT2 OUT2 V H 16 30 V A REF REF R H 17 29 R A FB FB 18 19 20 21 22 23 24 25 26 27 28 NC = NO CONNECT REV. C NC = NO CONNECT Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. I H I E OUT1 12 44 OUT2 I H I E 13 43 OUT1 OUT2 SDOUT 14 42 R E FB CLR 15 41 V E REF 16 40 V LDAC DD 17 39 DGND FSIN SDIN 18 38 AGND CLKIN 19 37 V D REF A0 20 36 R D FB I A 21 35 I D OUT2 OUT1 I A 22 34 I D OUT1 OUT2 I H I E OUT1 OUT2 I H I E OUT2 OUT1 SDOUT R E FB CLR V E REF LDAC V DD FSIN DGND SDIN AGND CLKIN V D REF A0 R D FB I A I D OUT2 OUT1 I A I D OUT1 OUT2(V = +4.75 V to +5.25 V I = I = O V V = +5 V T = T to T , DD OUT1 OUT2 REF A MIN MAX 1 unless otherwise noted) AD7568SPECIFICATIONS 2 Parameter AD7568B Units Test Conditions/Comments ACCURACY 12 Resolution 12 Bits 1 LSB = V /2 = 1.22 mV when V = 5 V REF REF Relative Accuracy 0.5 LSB max Differential Nonlinearity 0.9 LSB max All Grades Guaranteed Monotonic over Temperature Gain Error +25C 4 LSBs max T to T 5 LSBs max MIN MAX Gain Temperature Coefficient 2 ppm FSR/C typ 5 ppm FSR/C max Output Leakage Current I OUT1 +25C 10 nA max See Terminology Section T to T 200 nA max MIN MAX REFERENCE INPUT Input Resistance 5 k min Typical Input Resistance = 7 k 9k max Ladder Resistance Mismatch 2 % max Typically 0.6% DIGITAL INPUTS V , Input High Voltage 2.4 V min INH V , Input Low Voltage 0.8 V max INL I , Input Current 1 A max INH C , Input Capacitance 10 pF max IN POWER REQUIREMENTS V Range 4.75/5.25 V min/V max DD Power Supply Sensitivity Gain/V 75 dB typ DD I 300 A max V = 4.0 V min, V = 0.4 V max DD INH INL 3.5 mA max V = 2.4 V min, V = 0.8 V max INH INL (These characteristics are included for Design Guidance and are not subject AC PERFORMANCE CHARACTERISTICS to test. DAC output op amp is AD843.) 2 Parameter AD7568B Units Test Conditions/Comments DYNAMIC PERFORMANCE Output Voltage Settling Time 500 ns typ To 0.01% of Full-Scale Range. DAC Latch Alternately Loaded with All 0s and All 1s. Digital to Analog Glitch Impulse 40 nVs typ Measured with V = 0 V. DAC Register Alternately REF Loaded with All 0s and All 1s. Multiplying Feedthrough Error 66 dB max V = 20 V pk-pk, 10 kHz Sine Wave. DAC Latch REF Loaded with All 0s. Output Capacitance 60 pF max All 1s Loaded to DAC. 30 pF max All 0s Loaded to DAC. Channel-to-Channel Isolation 76 dB typ Feedthrough from Any One Reference to the Others with 20 V pk-pk, 10 kHz Sine Wave Applied. Digital Crosstalk 40 nVs typ Effect of all 0s to all 1s Code Transition on Nonselected DACs. Digital Feedthrough 40 nVs typ Feedthrough to Any DAC Output with FSIN High and Square Wave Applied to SDIN and SCLK. Total Harmonic Distortion 83 dB typ V = 6 V rms, 1 kHz Sine Wave. REF Output Noise Spectral Density 1 kHz 20 nV/Hz All 1s Loaded to the DAC. V = 0 V. Output Op REF Amp is AD OP07. NOTES 1 Temperature range as follows: B Version: 40C to +85C. 2 All specifications also apply for V = +10 V, except relative accuracy which degrades to 1 LSB. REF Specifications subject to change without notice. REV. C 2