Product Information

AD7606BSTZ-RL

AD7606BSTZ-RL electronic component of Analog Devices

Datasheet
Data Acquisition System (DAS), ADC 16 b 200k DSP, MICROWIRE™, Parallel, QSPI™, Serial, SPI™ 64-LQFP (10x10)

Manufacturer: Analog Devices
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Price (USD)

1: USD 20.9143 ea
Line Total: USD 20.91

2863 - Global Stock
Ships to you between
Fri. 17 May to Wed. 22 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
719 - WHS 1


Ships to you between
Fri. 17 May to Wed. 22 May

MOQ : 1
Multiples : 1

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AD7606BSTZ-RL
Analog Devices

1 : USD 19.6741
10 : USD 17.7583
30 : USD 17.0639
100 : USD 15.6849

     
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8-/6-/4-Channel DAS with 16-Bit, Bipolar Input, Simultaneous Sampling ADC Data Sheet AD7606/AD7606-6/AD7606-4 FEATURES APPLICATIONS 8/6/4 simultaneously sampled inputs Power-line monitoring and protection systems True bipolar analog input ranges: 10 V, 5 V Multiphase motor control Pin to pin compatible with the state-of-the-art AD7606B Instrumentation and control systems Single 5 V analog supply and 2.3 V to 5 V V Multiaxis positioning systems DRIVE Fully integrated data acquisition solution Data acquisition systems (DAS) Analog input clamp protection Table 1. High Resolution, Bipolar Input, Simultaneous Input buffer with 1 M analog input impedance Sampling DAS Solutions Second-order antialiasing analog filter Single- True On-chip accurate reference and reference buffer Ended Differential Number of 16-bit ADC with 200 kSPS on all channels Resolution Inputs Inputs Channels Oversampling capability with digital filter 18 Bits AD7608 AD7609 8 Flexible parallel/serial interface 1 16 Bits AD7606B 8 SPI/QSPI/MICROWIRE/DSP compatible AD7606 8 Performance AD7606-EP 8 7 kV ESD rating on analog input channels AD7606-6 6 95.5 dB SNR, 107 dB THD AD7606-4 4 0.5 LSB INL, 0.5 LSB DNL AD7605-4 4 Low power: 100 mW 14 Bits AD7607 8 Standby mode: 25 mW 1 Temperature range: 40C to +85C This state-of-the-art device is recommended for newer designs as an alternative to the AD7606. 64-lead LQFP package FUNCTIONAL BLOCK DIAGRAM AV AV CC CC REGCAP REGCAP REFCAPB REFCAPA 1M R FB V1 CLAMP T/H SECOND- V1GND CLAMP 2.5V 2.5V ORDER LPF R 1M FB LDO LDO 1M R FB REFIN/REFOUT V2 CLAMP T/H SECOND- V2GND CLAMP ORDER LPF R 1M FB REF SELECT 2.5V REF AGND 1M R FB V3 CLAMP T/H OS 2 SECOND- V3GND CLAMP ORDER LPF R 1M FB OS 1 OS 0 1M R FB V4 CLAMP T/H D A SECOND- OUT V4GND CLAMP SERIAL ORDER LPF R 1M FB D B OUT 8:1 MUX PARALLEL/ 1M R RD/SCLK FB 16-BIT DIGITAL V5 CLAMP SERIAL SAR FILTER T/H CS INTERFACE SECOND- V5GND CLAMP ORDER LPF R 1M FB PAR/SER/BYTE SEL V DRIVE 1M R FB V6 CLAMP T/H SECOND- V6GND CLAMP PARALLEL DB 15:0 ORDER LPF R 1M FB AD7606 1M R FB V7 CLAMP T/H SECOND- V7GND CLAMP ORDER LPF CLK OSC R 1M FB 1M R FB BUSY V8 CLAMP CONTROL T/H INPUTS SECOND- FRSTDATA V8GND CLAMP ORDER LPF R 1M FB AGND CONVST A CONVST B RESET RANGE Figure 1. Rev. F Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20102020 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. 08479-001AD7606/AD7606-6/AD7606-4 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Analog Input ............................................................................... 22 Applications ...................................................................................... 1 ADC Transfer Function ............................................................ 23 Functional Block Diagram .............................................................. 1 Internal/External Reference ...................................................... 24 Revision History ............................................................................... 2 Typical Connection Diagram ................................................... 25 General Description ......................................................................... 3 Power-Down Modes .................................................................. 25 Specifications .................................................................................... 4 Conversion Control ................................................................... 26 Timing Specifications .................................................................. 7 Digital Interface .............................................................................. 27 Absolute Maximum Ratings ......................................................... 11 Parallel Interface (PAR/SER/BYTE SEL = 0) ......................... 27 Thermal Resistance .................................................................... 11 Parallel Byte (PAR/SER/BYTE SEL = 1, DB15 = 1) .............. 27 ESD Caution................................................................................ 11 Serial Interface (PAR/SER/BYTE SEL = 1) ............................ 27 Pin Configurations and Function Descriptions ......................... 12 Reading During Conversion ..................................................... 28 Typical Performance Characteristics ........................................... 17 Digital Filter ................................................................................ 29 Terminology .................................................................................... 21 Layout Guidelines ...................................................................... 33 Theory of Operation ...................................................................... 22 Outline Dimensions ....................................................................... 35 Converter Details ....................................................................... 22 Ordering Guide .......................................................................... 35 REVISION HISTORY 4/2020Rev. E to Rev. F 1/2012Rev. B to Rev. C Change to Features Section ............................................................. 1 Changes to Analog Input Ranges Section ................................... 22 Changes to Table 1 ........................................................................... 1 10/2011Rev. A to Rev. B 5/2018Rev. D to Rev. E Changes to Input High Voltage (V ) and Input Low Voltage INH Changes to Patent Note, Note 1 ..................................................... 3 (V ) Parameters and Endnote 6, Table 2 ..................................... 4 INL Changes to tCONV Parameter, Table 3 ............................................. 7 Changes to Table 3 ............................................................................ 7 Changes to Table 4 ......................................................................... 11 11/2017Rev. C to Rev. D Changes to Pin 32 Description, Table 6 ...................................... 13 Changes to Features Section ........................................................... 1 Changes to Analog Input Clamp Protection Section ................ 22 Changes to Specifications Table Summary ................................... 3 Changes to Typical Connection Diagram Section .................... 25 Deleted Endnote 1, Table 1 Renumbered Sequentially .............. 6 Change to Table 6 ........................................................................... 14 8/2010Rev. 0 to Rev. A Changes to Typical Performance Characteristics Section ........ 17 Changes to Note 1, Table 2 .............................................................. 6 Changes to Terminology Section ................................................. 21 Changes to Ordering Guide .......................................................... 34 5/2010Revision 0: Initial Version Rev. F Page 2 of 37

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