Low Power, 16-Bit Buffered Sigma-Delta ADC Data Sheet AD7790 FUNCTIONAL BLOCK DIAGRAM FEATURES Power GND V REFIN DD Supply: 2.5 V to 5.25 V operation Normal: 75 A maximum V DD INTERNAL CLOCK Power-down: 1 A maximum RMS noise: 1.1 V at 9.5 Hz update rate 16-BIT SERIAL 16-bit p-p resolution DIGITAL BUF AIN ADC INTERFACE PGA Integral nonlinearity: 3.5 ppm typical Simultaneous 50 Hz and 60 Hz rejection AD7790 GND Internal clock oscillator 03538-0-001 Programmable gain amplifier Figure 1. Rail-to-rail input buffer V monitor channel DD Temperature range: 40C to +105C GENERAL DESCRIPTION 10-lead MSOP The AD7790 is a low power, complete analog front end for low frequency measurement applications. It contains a low INTERFACE noise 16-bit - ADC with one differential input that can be 3-wire serial buffered or unbuffered along with a digital PGA, which allows SPI, QSPI, MICROWIRE, and DSP compatible gains of 1, 2, 4, and 8. Schmitt trigger on SCLK The device operates from an internal clock. Therefore, the user APPLICATIONS does not have to supply a clock source to the device. The output Smart transmitters data rate from the part is software programmable and can be Battery applications varied from 9.5 Hz to 120 Hz, with the rms noise equal to Portable instrumentation 1.1 V at the lower update rate. The internal clock frequency Sensor measurement can be divided by a factor of 2, 4, or 8, which leads to a reduc- tion in the current consumption. The update rate, cutoff Temperature measurement frequency, and settling time will scale with the clock frequency. Pressure measurement Weigh scales The part operates with a power supply from 2.5 V to 5.25 V. 4 to 20 mA loops When operating from a 3 V supply, the power dissipation for the part is 225 W maximum. It is housed in a 10-lead MSOP. Rev. A Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no re- sponsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20042013 Analog Devices, Inc. All rights reserved. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. AD7790 Data Sheet TABLE OF CONTENTS AD7790Specifications .................................................................. 3 Reduced Current Modes ........................................................... 13 , Timing Characteristics ................................................................... 5 Digital Interface .......................................................................... 14 Absolute Maximum Ratings ............................................................ 7 Single Conversion Mode ....................................................... 15 ESD Caution .................................................................................. 7 Continuous Conversion Mode ............................................. 15 Pin Configuration and Function Descriptions ............................. 8 Continuous Read Mode ........................................................ 16 Typical Performance Characteristics ............................................. 9 Circuit Description......................................................................... 17 On-Chip Registers .......................................................................... 10 Analog Input Channel ............................................................... 17 Communications Register (RS1, RS0 = 0, 0) .......................... 10 Programmable Gain Amplifier ................................................. 17 Status Register (RS1, RS0 = 0, 0 Power-on/Reset = 0x88) ... 11 Bipolar Configuration ................................................................ 17 Mode Register (RS1, RS0 = 0, 1 Power-on/Reset = 0x02) .... 11 Data Output Coding .................................................................. 17 Filter Register (RS1, RS0 = 1, 0 Power-on/Reset = 0x04)..... 12 Reference Input ........................................................................... 17 Data Register (RS1, RS0 = 1, 1 Power-on/Reset = 0x0000) . 12 V Monitor ................................................................................ 18 DD ADC Circuit Information .............................................................. 13 Grounding and Layout .............................................................. 18 O ver vie w ...................................................................................... 13 Outline Dimensions ....................................................................... 19 Noise Performance ..................................................................... 13 Ordering Guide .......................................................................... 19 REVISION HISTORY 3/13Rev. 0 to Rev. A Added ESD Caution Section ............................................................ 7 Changes to Figure 10 ....................................................................... 15 Change to Reference Input Section ............................................... 17 Updated Outline Dimensions ........................................................ 19 Changes to Ordering Guide ........................................................... 19 8/03Revision 0: Initial Version Rev. A Page 2 of 20