8-/10-/12-/14-Bit, 175 MSPS TxDAC Digital-to-Analog Converters Data Sheet AD9704/AD9705/AD9706/AD9707 mode reduces the standby power dissipation to approximately FEATURES 2.2 mW. 175 MSPS update rate The AD9704/AD9705/AD9706/AD9707 has an optional serial Low power member of pin-compatible peripheral interface (SPI) that provides a higher level of program- TxDAC product family mability to enhance performance of the DAC. An adjustable Low power dissipation output, common-mode feature allows for easy interfacing to other 12 mW at 80 MSPS, 1.8 V components that require common modes from 0 V to 1.2 V. 50 mW at 175 MSPS, 3.3 V Wide supply voltage: 1.7 V to 3.6 V Edge-triggered input latches and a 1.0 V temperature- SFDR to Nyquist compensated band gap reference have been integrated to AD9707: 84 dBc at 5 MHz output provide a complete, monolithic DAC solution. The digital inputs AD9707: 83 dBc at 10 MHz output support 1.8 V and 3.3 V CMOS logic families. AD9707: 75 dBc at 20 MHz output PRODUCT HIGHLIGHTS Adjustable full-scale current outputs: 1 mA to 5 mA 1. Pin Compatible. The AD9704/AD9705/AD9706/AD9707 On-chip 1.0 V reference line of TxDAC converters is pin-compatible with the CMOS-compatible digital interface AD9748/AD9740/AD9742/AD9744 TxDAC line (LFCSP Common-mode output: adjustable 0 V to 1.2 V package). Power-down mode <2 mW at 3.3 V (SPI controllable) 2. Low Power. Complete CMOS DAC operates on a single Self-calibration supply of 3.6 V down to 1.7 V, consuming 50 mW (3.3 V) Compact 32-lead LFCSP, RoHS compliant package and 12 mW (1.8 V). The DAC full-scale current can be GENERAL DESCRIPTION reduced for lower power operation. Sleep and power-down The AD9704/AD9705/AD9706/AD9707 are the fourth-generation modes are provided for low power idle periods. family in the TxDAC series of high performance, CMOS digital- 3. Self-Calibration. Self-calibration enables true 14-bit INL to-analog converters (DACs). This pin-compatible, 8-/10-/12-/14- and DNL performance in the AD9707. bit resolution family is optimized for low power operation, 4. Twos Complement/Binary Data Coding Support. Data input supports twos complement or straight binary data while maintaining excellent dynamic performance. The coding. AD9704/ AD9705/AD9706/AD9707 family is pin-compatible with the AD9748/AD9740/AD9742/AD9744 family of TxDAC 5. Flexible Clock Input. A selectable high speed, single- converters and is specifically optimized for the transmit signal ended, and differential CMOS clock input supports 175 path of communication systems. All of the devices share the MSPS conversion rate. same interface, LFCSP package, and pinout, providing an upward 6. Device Configuration. Device can be configured through or downward component selection path based on performance, pin strapping, and SPI control offers a higher level of resolution, and cost. The AD9704/AD9705/AD9706/AD9707 programmability. offers exceptional ac and dc performance, while supporting 7. Easy Interfacing to Other Components. Adjustable common-mode output allows for easy interfacing to other update rates up to 175 MSPS. signal chain components that accept common-mode levels The flexible power supply operating range of 1.7 V to 3.6 V and from 0 V to 1.2 V. low power dissipation of the AD9704/AD9705/AD9706/AD9707 8. On-Chip Voltage Reference. The AD9704/AD9705/AD9706/ parts make them well suited for portable and low power AD9707 include a 1.0 V temperature-compensated band applications. gap voltage reference. Power dissipation of the AD9704/AD9705/AD9706/AD9707 can 9. Industry-Standard 32-Lead LFCSP Package. be reduced to 15 mW, with a small trade-off in performance, by lowering the full-scale current output. In addition, a power-down Rev. E Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. Tel: 781.329.4700 20062020 Analog Devices, Inc. All rights reserved. No license is granted by implication or otherwise under any patent or patent rights of Analog Technical Support www.analog.com Devices. Trademarks and registered trademarks are the property of their respective owners. AD9704/AD9705/AD9706/AD9707 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Terminology .................................................................................... 29 General Description ......................................................................... 1 Theory of Operation ...................................................................... 30 Product Highlights ........................................................................... 1 Serial Peripheral Interface ......................................................... 30 Revision History ............................................................................... 2 SPI Register Map ........................................................................ 32 Functional Block Diagram .............................................................. 4 SPI Register Descriptions .......................................................... 33 Specifications .................................................................................... 5 Reference Operation .................................................................. 34 DC Specifications (3.3 V) ............................................................ 5 Reference Control Amplifier .................................................... 34 Dynamic Specifications (3.3 V) .................................................. 6 DAC Transfer Function ............................................................ 35 Digital Specifications (3.3 V) ...................................................... 7 Analog Outputs .......................................................................... 35 DC Specifications (1.8 V) ............................................................ 8 Adjustable Output Common Mode ........................................ 36 Dynamic Specifications (1.8 V) .................................................. 9 Digital Inputs .............................................................................. 36 Digital Specifications (1.8 V) .................................................... 10 Clock Input ................................................................................. 36 Timing Diagram ......................................................................... 10 DAC Timing ............................................................................... 36 Absolute Maximum Ratings ......................................................... 11 Power Dissipation ...................................................................... 37 Thermal Characteristics ............................................................ 11 Self-Calibration .......................................................................... 38 ESD Caution................................................................................ 11 Applications Information ............................................................. 40 Pin Configurations and Function Descriptions ......................... 12 Output Configurations .............................................................. 40 AD9707 ........................................................................................ 12 Differential Coupling Using a Transformer .............................. 40 AD9706 ........................................................................................ 13 Single-Ended Buffered Output Using an Op Amp ............... 40 AD9705 ........................................................................................ 14 Differential Buffered Output Using an Op Amp ................... 41 AD9704 ........................................................................................ 15 Evaluation Board ........................................................................ 41 Typical Performance Characteristics ........................................... 16 Outline Dimensions ....................................................................... 42 AD9707......................................................................................... 16 Ordering Guide .......................................................................... 42 AD9704, AD9705 and AD9706 .................................................. 23 REVISION HISTORY 9/2020Rev. D to Rev. E Changes to Table 11 ....................................................................... 14 Changed CP-32-2 to CP-32-7 ...................................... Throughout Changes to Table 12 ....................................................................... 15 Changes to Figure 3 ........................................................................ 12 Changes to Reference Operation Section ................................... 34 Changes to Figure 4 ........................................................................ 13 Updated Outline Dimensions ...................................................... 42 Changes to Figure 5 ........................................................................ 14 Changes to Ordering Guide .......................................................... 42 Changes to Figure 6 ........................................................................ 15 Updated Outline Dimensions ....................................................... 42 10/2011Rev. A to Rev. B Changes to Ordering Guide .......................................................... 42 Changes to Features Section ............................................................ 1 Changes to Table 1 ............................................................................ 5 11/2017Rev. C to Rev. D Changes to Table 2 ............................................................................ 6 Changed CP-32-7 to CP-32-2 ...................................... Throughout Changes to Table 4 ............................................................................ 8 Updated Outline Dimensions ....................................................... 42 Changes to Table 5 ............................................................................ 9 Changes to Ordering Guide .......................................................... 42 Changes to Figure 3 and Table 9 .................................................. 12 Changes to Figure 4 and Table 10 ................................................ 13 9/2017Rev. B to Rev. C Changes to Figure 5 and Table 11 ................................................ 14 Changed CP-32-2 to CP-32-7 ...................................... Throughout Changes to Figure 6 and Table 12 ................................................ 15 Changes to Figure 15 and Figure 16 ............................................ 17 Changes to Table 9 ......................................................................... 12 Changes to Table 10 ....................................................................... 13 Moved Figure 41 to Figure 24 Position ....................................... 18 Rev. E Page 2 of 42