Dual 3 MHz, 800 mA Buck Regulators with Two 300 mA LDOs Data Sheet ADP5037 load is above a predefined threshold, the buck regulators FEATURES operate in PWM mode. When the load current falls below a Main input voltage range: 2.3 V to 5.5 V predefined threshold, the regulator operates in power save Two 800 mA buck regulators and two 300 mA LDOs mode (PSM), improving the light-load efficiency. 24-lead, 4 mm 4 mm LFCSP package Regulator accuracy: 1.8% Table 1. Family Models Factory programmable or external adjustable VOUTx Maximum Model Channels Current Package 3 MHz buck operation with forced PWM and auto PWM/PSM ADP5023 2 Buck, 1 LDO 800 mA, LFCSP (CP-24-10) modes 300 mA BUCK1/BUCK2: output voltage range from 0.8 V to 3.8 V ADP5024 2 Buck, 1 LDO 1.2 A, LFCSP (CP-24-10) LDO1/LDO2: output voltage range from 0.8 V to 5.2 V 300 mA LDO1/LDO2: input supply voltage from 1.7 V to 5.5 V ADP5034 2 Buck, 2 LDOs 1.2 A, LFCSP (CP-24-10), 300 mA TSSOP (RE-28-1) LDO1/LDO2: high PSRR and low output noise ADP5037 2 Buck, 2 LDOs 800 mA, LFCSP (CP-24-10) 300 mA APPLICATIONS ADP5033 2 Buck, 2 LDOs with 800 mA, WLCSP (CB-16-8) Power for processors, ASICS, FPGAs, and RF chipsets 2 EN pins 300 mA Portable instrumentation and medical devices The two bucks operate out of phase to reduce the input capaci- Space constrained devices tor requirement. The low quiescent current, low dropout voltage, GENERAL DESCRIPTION and wide input voltage range of the ADP5037 LDOs extend the battery life of portable devices. The ADP5037 LDOs maintain The ADP5037 combines two high performance buck regulators power supply rejection greater than 60 dB for frequencies as and two low dropout (LDO) regulators in a small, 24-lead 4 mm high as 10 kHz while operating with a low headroom voltage. 4 mm LFCSP to meet demanding performance and board space requirements. Regulators in the ADP5037 are activated though dedicated The high switching frequency of the buck regulators enables tiny enable pins. The default output voltages can be externally set in multilayer external components and minimizes the board space. the adjustable version or factory programmable to a wide range When the MODE pin is set high, the buck regulators operate in of preset values in the fixed voltage version. forced PWM mode. When the MODE pin is set low and the TYPICAL APPLICATION CIRCUIT AVIN HOUSEKEEPING C AVIN VOUT1 0.1F L1 1H VIN1 SW1 2.3V TO V AT OUT1 5.5V C1 800mA FB1 R1 4.7F BUCK1 C5 R2 10F PGND1 ON EN1 EN1 OFF MODE PWM MODE PSM/PWM VOUT2 VIN2 MODE L2 1H C2 SW2 V AT OUT2 4.7F 800mA BUCK2 FB2 R3 C6 EN2 R4 EN2 10F PGND2 EN3 VOUT3 V AT OUT3 EN3 LDO1 300mA R5 FB3 VIN3 1.7V TO (ANALOG) C7 5.5V C3 1F R6 1F EN4 ON VOUT4 V AT EN4 OUT4 OFF 300mA LDO2 R7 FB4 VIN4 (DIGITAL) C8 1F C4 R8 1F ADP5037 AGND Figure 1. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 20112013 Analog Devices, Inc. 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Technical Support www.analog.com Trademarks and registered trademarks are the property of their respective owners. 09887-001ADP5037 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 15 Applications ....................................................................................... 1 Power Management Unit ........................................................... 15 General Description ......................................................................... 1 BUCK1 and BUCK2 .................................................................. 17 Typical Application Circuit ............................................................. 1 LDO1 and LDO2 ........................................................................ 18 Revision History ............................................................................... 2 Applications Information .............................................................. 19 Specifications ..................................................................................... 3 Buck External Component Selection ....................................... 19 General Specifications ................................................................. 3 LDO External Component Selection....................................... 21 BUCK1 and BUCK2 Specifications ........................................... 4 Power Dissipation and Thermal Considerations ....................... 22 LDO1 and LDO2 Specifications ................................................. 4 Buck Regulator Power Dissipation .......................................... 22 Input and Output Capacitor, Recommended Specifications .. 5 Junction Temperature ................................................................ 23 Absolute Maximum Ratings ............................................................ 6 PCB Layout Guidelines .................................................................. 24 Thermal Resistance ...................................................................... 6 Typical Application Schematics .................................................... 25 ESD Caution .................................................................................. 6 Bill of Materials ............................................................................... 26 Pin Configuration and Function Descriptions ............................. 7 Outline Dimensions ....................................................................... 27 Typical Performance Characteristics ............................................. 8 Ordering Guide .......................................................................... 27 REVISION HISTORY 5/13Rev. C to Rev. D Moved Power Dissipation and Thermal Considerations Section .............................................................................................. 22 Added Table 1 Renumbered Sequentially .................................... 1 Changes to Buck Regulator Power Dissipation Section ............ 22 Changes to Figure 1 .......................................................................... 1 Changes to PCB Layout Guidelines Section ............................... 24 Changes to NC Pin Description ..................................................... 7 Changes to Ordering Guide .......................................................... 27 Changes to Figure 48 ...................................................................... 18 Changes to Figure 50 ...................................................................... 20 1/12Rev. 0 to Rev. A Changes to Figure 52 and Figure 53 ............................................. 25 Changes to Features Section and Figure 1 ..................................... 1 1/13Rev. B to Rev. C Changes to Table 2 and Table 3........................................................ 4 Changes to Table 4 ............................................................................. 5 Changes to Figure 9 .......................................................................... 9 Changes to Table 5 ............................................................................. 6 Changes to Ordering Guide .......................................................... 27 Changes to Table 7 ............................................................................. 7 8/12Rev. A to Rev. B Changes to Figure 34 ...................................................................... 13 Changes to Regulator Accuracy, Features Section ....................... 1 Changes to Buck Regulator Power Dissipation Section ............ 15 Changes to Output Voltage Accuracy, Table 2 and Voltage Changes to Undervoltage Lockout Section ................................. 18 Feedback, Table 2 .............................................................................. 4 Changes to LDO1 and LDO2 Section ......................................... 20 Changes to Output Voltage Accuracy, Table 3 and Voltage Changes to Table 9 .......................................................................... 22 Feedback, Table 3 .............................................................................. 4 Changes to Figure 52 and Figure 53 ............................................ 25 Changes to Figure 6, Figure 7, and Figure 8.................................. 8 Changes to Ordering Guide .......................................................... 27 Changes to Figure 9 to Figure 14 .................................................... 9 Changes to Figure 30 and Figure 31 ............................................. 12 8/11Revision 0: Initial Version Changes to Figure 34 and Figure 38 Caption ............................. 13 Changes to Undervoltage Lockout Section ................................. 16 Rev. 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