LTC3831 High Power Synchronous Switching Regulator Controller for DDR Memory Termination FEATURES DESCRIPTION n High Power Switching Regulator Controller The LTC 3831 is a high power, high ef ciency switching for DDR Memory Termination regulator controller designed for DDR memory termina- n V Tracks 1/2 of V or External V tion. The LTC3831 generates an output voltage equal OUT IN REF n No Current Sense Resistor Required to 1/2 of an external supply or reference voltage. The n Low Input Supply Voltage Range: 3V to 8V LTC3831 uses a synchronous switching architecture n Maximum Duty Cycle >91% Over Temperature with N-channel MOSFETs. Additionally, the chip senses n Drives All N-Channel External MOSFETs output current through the drain-source resistance of the n High Ef ciency: Over 95% Possible upper N-channel FET, providing an adjustable current limit n Programmable Fixed Frequency Operation: without a current sense resistor. 100kHz to 500kHz The LTC3831 operates with input supply voltage as low as n External Clock Synchronization Operation 3V and with a maximum duty cycle of >91%. It includes n Programmable Soft-Start a xed frequency PWM oscillator for low output ripple n Low Shutdown Current: <10A operation. The 200kHz free-running clock frequency can n Overtemperature Protection be externally adjusted or synchronized with an external n Available in 16-Pin Narrow SSOP Package signal from 100kHz to above 500kHz. In shutdown mode, the LTC3831 supply current drops to <10A. APPLICATIONS L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. n DDR SDRAM Termination n SSTL 2 Interface n SSTL 3 Interface TYPICAL APPLICATION V DDQ 5V 2.5V Ef ciency vs Load Current 100 + C IN MBR0530T1 330F 90 2 80 0.1F 1F PV PV CC2 CC1 10k Q1 MBRS340T3 70 V TG CC 60 0.1F L O SS I 0.1F MAX 1.2H 50 V 1k TT 0.01F + LTC3831 I 1.25V FB 40 130k 4.7F 6A FREQSET BG Q2 MBRS340T3 30 + C OUT SHDN SHDN PGND T = 25C 20 A 470F V = 2.5V IN COMP GND 3 C : SANYO POSCAP 6TPB330M IN 10 V = 1.25V C1 OUT R + C : SANYO POSCAP 4TPB470M C OUT R 33pF 0 15k Q1, Q2: SILICONIX Si4410DY 3831 F01 0 1 34 5 6 2 FB C C R LOAD CURRENT (A) 1500pF 2831 G01 Figure 1. Typical DDR Memory Termination Application 3831fb 1 EFFICIENCY (%)LTC3831 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) TOP VIEW Supply Voltage TG 1 16 BG V .............................................................................. 9V CC PV 2 15 PV CC1 CC2 PV ...................................................................... 14V CC1,2 PGND 3 14 V CC Input Voltage GND 4 13 I FB I , I ..................................................... 0.3V to 14V FB MAX R 5 12 I MAX + R , R , FB, SHDN, FREQSET .......... 0.3V to V to 0.3V CC FB 6 11 FREQSET Junction Temperature (Note 9) ............................. 125C + R 7 10 COMP Operating Temperature Range Note 4) .....40C to 85C SHDN 8 9 SS Storage Temperature Range ...................65C to 150C GN PACKAGE 16-LEAD PLASTIC SSOP Lead Temperature (Soldering, 10 sec) .................. 300C T = 125C, = 130C/W JMAX JA ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3831EGN PBF LTC3831EGN TRPBF 3831 16-Lead Plastic SSOP 40C to 85C LTC3831IGN PBF LTC3831IGN TRPBF 3831 16-Lead Plastic SSOP 40C to 85C LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3831EGN LTC3831EGN TR 3831 16-Lead Plastic SSOP 40C to 85C LTC3831IGN LTC3831IGN TR 3831 16-Lead Plastic SSOP 40C to 85C Consult LTC Marketing for parts speci ed with wider operating temperature ranges. For more information on lead free part marking, go to: