TISP8200HDM BUFFERED P-GATE SCR DUAL TISP8201HDM BUFFERED N-GATE SCR DUAL COMPLEMENTARY BUFFERED-GATE SCRS FOR DUAL POLARITY SLIC OVERVOLTAGE PROTECTION TISP820xHDM Overvoltage Protectors Agency Recognition High Performance Protection for SLICs with +ve & -ve Battery Supplies Description TISP8200HDM Negative Overvoltage Protector UL File Number: E215609 Wide -20 to -110 V Programming Range Low +15 mA Max. Gate Triggering Current TISP8200HDM 8-SOIC (210 mil) Package (Top View) High -150 mA Min. Holding Current (Tip) K1 K1 (Tip) 1 8 TISP8201HDM Positive Overvoltage Protector Wide +20 to +110 V Programming Range (-V ) G 7 A (Ground) (BAT) 2 Low -15 mA Max. Gate Triggering Current NC 3 6 A (Ground) +20 mA Min. Holding Current (Ring) K2 (Ring) 45 K2 Rated for International Surge Wave Shapes NC - No internal connection I PPSM Terminal typical application names shown in parenthesis Wave ShapeStandard A MD-8SOIC(210)-007-a 2/10 GR-1089-CORE 500 TISP8200HDM Device Symbol 10/700 ITU-T K.20/21/45 150 K1 K1 10/1000 GR-1089-CORE 100 ................................................... UL Recognized Component Circuit Application Diagram A SLIC G PROTECTION A Tip C2 220 nF SD-TISP8-001-a K2 K2 TISP8201HDM 8-SOIC (210 mil) Package (Top View) C1 220 nF (Tip) A1 A1 (Tip) 1 8 (+V ) G 7 K (Ground) (BAT) 2 NC 3 6 K (Ground) Ring (Ring) A2 (Ring) 45 A2 TISP8200HDM TISP8201HDM +V BAT NC - No internal connection - V Terminal typical application names shown in parenthesis BAT MD-8SOIC(210)-008-a AI-TISP8-002-b TISP8201HDM Device Symbol A1 A1 WARNING Cancer and Reproductive Harm K www.P65Warnings.ca.gov G K OCTOBER 2005 REVISED JULY 2019 *RoHS Directive 2015/863, Mar 31, 2015 and Annex. Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf. SD-TISP8-002-a A2 A2TISP820xHDM Overvoltage Protectors Description The TISP8200HDM/TISP8201HDM combination has been designed to protect dual polarity supply rail monolithic SLICs (Subscriber Line Interface Circuits) against overvoltages on the telephone line caused by lightning, a.c. power contact and induction. Protection against negative overvoltages is given by the TISP8200HDM. Protection against positive overvoltages is given by the TISP8201HDM. Both parts are in 8-SOIC (210 mil) surface mount packages. The TISP8200HDM has an array of two buffered P-gate SCRs with a common anode connection. Each SCR cathode and gate has a separate terminal connection. The NPN buffer transistors reduce the gate supply current. In use, the cathodes of the TISP8200HDM SCRs are connected to the two conductors of the POTS line. The gates are connected to the appropriate negative voltage battery feed of the SLIC driving the line conductor pair, so that the TISP8200HDM protection voltage tracks the SLIC negative supply voltage. The anode of the TISP8200HDM is connected to the SLIC common. Negative overvoltages are initially clipped close to the SLIC negative supply by emitter follower action of the NPN buffer transistor. If sufficient clipping current flows, the SCR will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides the high holding current of the SCR helps prevent d.c. latchup. The TISP8201HDM has an array of two buffered N-gate SCRs with a common cathode connection. Each SCR anode and gate has a separate terminal connection. The PNP buffer transistors reduce the gate supply current. In use, the anodes of the TISP8201HDM SCRs are connected to the two conductors of the POTS line. The gates are connected to the appropriate positive voltage battery feed of the SLIC driving that line pair, so that the TISP8201HDM protection voltage tracks the SLIC positive supply voltage. The cathode of the TISP8201HDM is connected to the SLIC common. Positive overvoltages are initially clipped close to the SLIC positive supply by emitter follower action of the PNP buffer transistor. If sufficient clipping current flows the SCR will regenerate and switch into a low voltage on-state condition. As the overvoltage subsides the SLIC pulls the conductor voltage down to its normal negative value and this commutates the conducting SCR into a reverse biased condition. How to Order Device Package Carrier Order As Marking Code Standard Quantity TISP8200HDM TISP8200HDMR-S 8200H 8-SOIC (210 mil) Embossed Tape Reeled 2000 TISP8201HDM TISP8201HDMR-S 8201H TISP8200HDM Absolute Maximum Ratings, T = 25 C (Unless Otherwise Noted) A Rating Symbol Value Unit Repetitive peak off-state voltage, V = 0 V -120 V GK DRM Repetitive peak reverse voltage, V = -70 V V 120 GA RRM Non-repetitive peak impulse current (see Notes 1, 2 and 3) 2/10 s (Telcordia GR-1089-CORE, 2/10 s voltage wave shape) -500 5/310 s (ITU-T K.44, 10/700 s voltage wave shape used in K.20/21/45) I -150 A PPSM 10/1000 s (Telcordia GR-1089-CORE, 10/1000 s voltage wave shape) -100 Non-repetitive peak on-state current, 50/60 Hz (see Notes 1, 2, 3 and 4) 10 ms 60 1 s 14 I A TSM 7 s 7 900 s 3.5 Junction temperature T -55 to +150 C J Storage temperature range T -65 to +150 C stg NOTES: 1. Initially the device must be in thermal equilibrium with T = 25 C. The surge may be repeated after the device returns to its initial J conditions. 2. These non-repetitive rated currents are peak values. The rated current values may be applied to any cathode-anode terminal pair. 3. Rated currents only apply if pins 1 & 8 (K1,Tip) are connected together, pins 4 & 5 (K2, Ring) are connected together and pins 6 & 7 (A, Ground) are connected together. 4. These non-repetitive rated terminal currents are for the TISP8200HDM and TISP8201HDM together. Device (A)-terminal positive current values are conducted by the TISP8201HDM and (K)-terminal negative current values by the TISP8200HDM. OCTOBER 2005 REVISED JULY 2019 Specifications are subject to change without notice. Users should verify actual device performance in their specific applications. The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.