VMMK-1218 0.5 to 18 GHz Low Noise E-PHEMT in a Wafer Scale Package Data Sheet Description Features Sub-miniature 0402 (1mm x 0.5mm) Surface Mount Avago Technologies has combined its industry leading Leadless Package E-pHEMT technology with a revolutionary chip scale Low height (0.25mm) package. The VMMK-1218 can produce an LNA with high dynamic range, high gain and low noise figure that Frequency Range 0.5 to 18 GHz generates off of a single position DC power supply. The 1 Enhancement Mode GaAsCap wafer scale sub-miniature leadless package is 0.25 micron gate width small and ultra thin, yet can be handled and placed with Tape and Reel packaging option available standard 0402 pick and place assembly. o Point MTTF > 300 years at 120 C channel temperature The use of 0.25 micron gates allow a ultra low noise figure (below 1dB from 500 MHz to 12 GHz) with respectable as- Specifications sociated gain. With a flat transconductance over bias and 0.7 dB Fmin frequency the VMMK-1218 provides excellent linearity 9.0 dB Ga of over 30 dBm and power over 15 dBm at one dB com- rd +22 dBm output 3 order intercept pression. This product is easy to use since it requires only positive DC voltages for bias and low matching coeffi- +12 dBm output power cients for simple impedance matching to 50 systems. Applications The VMMK-1218 is intended for any 500MHz to 18GHz Low Noise and Driver for Cellular/PCS and WCDMA application including 802.11abgn WLAN, WiMax, BWA Base Stations 802.16 & 802.20 and military applications. 2.4 GHz, 3.5GHz, 5-6GHz WLAN and WiMax notebook WLP 0402, 1mm x 0.5mm x 0.25 mm computer, access point and mobile wireless applications DBS 10 to 13 GHz receivers VSAT and SATCOM 13 to 18 GHz systems t Gate Drain t BYY 802.16 & 802.20 BWA systems WLL and MMDS Transceivers General purpose discrete E-pHEMT for other ultra low Pin Connections (Top View) noise applications Notes: Top view package marking provides orientation Notes: 1. The Avago enhancement mode pHEMT devices do not require a negative gate bias voltage as they are normally off. They can help simplify the design and reduce the cost of receivers and transmitters in many applications from 500 MHz to 18 GHz Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model = 20 V (class A) gate source drain ESD Human Body Model = 100 V (Class 0) Refer to Avago Application Note A004R: Notes: Electrostatic Discharge, Damage and Control. b = Device Code YY = Year Code BYYVMMK-1218 Absolute Maximum Ratings Sym Parameters/Condition Unit Max 2 Vds Drain-Source Voltage V5 2 Vgs Gate-Source Voltage V -5 to 1 2 Vgd Gate-Drain Voltage V -5 to 1 2 Ids Drain Current mA 100 Igs Gate Current mA 1.6 3 Pdn Total Power Dissipation mW 300 Pin RF CW Input Power Max dBm 10 Tch Max channel temperature C +150 4 jc Thermal Resistance C/W 200 Notes: 70 1. Operation in excess of any of these conditions may results in 0.7 V 60 permanent damage to this device. 2. Assumes DC quiescent conditions 50 3. Ambient operational temperature T =25C unless noted. A 0.6 V 4. Thermal resistance measured using 150C Liquid Crystal Measurement 40 Method 5. The device can handle + 10dBm RF input power provided lgs is 30 limited to 1ma 0.5 V 20 10 0.4 V 0.3 V 0 67 0 1 2 3 45 V (V) DS Figure 1. Typical I-V Curves. (VGS=0.1 V per step) 6,7 VMMK-1218 RF Specifications (on board) T = 25C, Freq = 10 GHz, Vds = 3V, Ids = 20mA, Zo = 50 (unless otherwise specified) A Sym Parameters/Condition Units Min Typ. Max Vgs Gate Voltage V 0.48 0.58 0.68 Igs Gate Current uA 0.4 Gm Transconductance mS 200 Ga Associated Gain dB 6.7 9 10.2 NF Noise Figure dB 0.81 1.5 Fmin Noise Figure min dB 0.71 P-1dB 1dB Compressed Output Power dBm +12 rd OIP3 Output 3 Order Intercept Point dBm +22 Notes: 6. Specifications are derived from measurements in a test circuit. 7. All tested parameters guaranteed with measurement accuracy 0.5dB for gain. 2 lDS (mA)