CS5550-ISZ Cirrus Logic

CS5550 Two-channel, Low-cost A/D Converter Features Description z Power Consumption <12 mW The CS5550 combines two ADCs and a serial interface on a single chip. The CS5550 has - with VD+ = 3.3 V on-chip functionality to facilitate offset and gain z Adjustable Input Range on AIN1 calibration. The CS5550 features a bi-directional z GND-referenced Signals with Single Supply serial interface for communication with a z On-chip 2.5 V Reference (25 ppm/C typ) microcontroller. z Simple Three-wire Digital Serial Interface z Power Supply Configurations VA+ = +5 V AGND = 0 V VD+ = +3.3 V to +5 V ORDERING INFORMATION: CS5550-IS -40C to +85C 24-pin SSOP CS5550-ISZ -40C to +85C, Lead-free 24-pin SSOP VA+ RESET VD+ AIN1+ + Calibration 4th Order Digital 10x,50x Modulator Filter Registers CS AIN1- - SDI Config Serial SDO Register Interface SCLK + AIN2+ Output INT 2nd Order Digital 10x Registers Modulator Filter AIN2- - VREFIN x1 Clock Voltage VREFOUT Generator Reference AGND XIN XOUT CPUCLK DGND MAR 05 Copyright Cirrus Logic, Inc. 2005 CS5550 TABLE OF CONTENTS 1. PIN DESCRIPTION ................................................................................................................... 4 2. CHARACTERISTICS/SPECIFICATIONS ................................................................................. 5 ANALOG CHARACTERISTICS................................................................................................ 5 VOLTAGE REFERENCE.......................................................................................................... 6 5 V DIGITAL CHARACTERISTICS........................................................................................... 7 3 V DIGITAL CHARACTERISTICS........................................................................................... 7 RECOMMENDED OPERATING CONDITIONS ....................................................................... 7 SWITCHING CHARACTERISTICS .......................................................................................... 8 2.1 Theory of Operation ......................................................................................................... 10 2.1.1 High-Rate Digital Low-Pass Filters ..................................................................... 10 2.1.2 Digital Compensation Filters ............................................................................... 10 2.1.3 Gain and Offset Adjustment ................................................................................ 10 2.2 Performing Measurements ............................................................................................... 10 2.3 CS5550 Linearity Performance ........................................................................................ 10 3. FUNCTIONAL DESCRIPTION ............................................................................................... 11 3.1 Analog Inputs ................................................................................................................... 11 3.2 Voltage Reference ........................................................................................................... 11 3.3 Oscillator Characteristics .................................................................................................11 3.4 Calibration ........................................................................................................................ 12 3.4.1 Overview of Calibration Process ......................................................................... 12 3.4.2 Calibration Sequence .......................................................................................... 12 3.4.3 Calibration Signal Input Level ............................................................................. 12 3.4.4 Input Configurations for Calibrations ................................................................... 12 3.4.5 Description of Calibration Algorithms .................................................................. 12 3.4.5.1 Offset Calibration Sequence ............................................................... 12 3.4.5.2 Gain Calibration Sequence ................................................................. 13 3.4.6 Duration of Calibration Sequence ....................................................................... 13 3.5 Interrupt ........................................................................................................................... 13 3.5.1 Typical use of the INT pin ................................................................................... 13 3.5.2 INT Active State .................................................................................................. 13 3.6 PCB Layout ...................................................................................................................... 14 4. SERIAL PORT OVERVIEW .................................................................................................... 15 4.1 Commands ....................................................................................................................... 15 4.2 Serial Port Interface ......................................................................................................... 18 4.3 Serial Read and Write ......................................................................................................18 4.3.1 Register Write ..................................................................................................... 18 4.3.2 Register Read ..................................................................................................... 18 4.4 System Initialization ......................................................................................................... 18 4.5 Serial Port Initialization .................................................................................................... 19 4.6 CS5550 Power States ...................................................................................................... 19 5. REGISTER DESCRIPTION .................................................................................................... 20 5.1 Configuration Register ......................................................................................................20 5.2 Offset Registers ................................................................................................................ 21 5.3 Gain Registers .................................................................................................................. 21 5.4 Cycle Count Register........................................................................................................21 5.5 OUT1 and OUT2 Output Registers................................................................................... 22 5.6 FILT1, FILT2 Unsigned Output Register........................................................................... 22 5.7 Status Register and Mask Register .................................................................................. 22 5.8 Control Register................................................................................................................ 23 6. PACKAGE DIMENSIONS ....................................................................................................... 24 2 DS630F1