AT45DB021E-UUN-T Dialog Semiconductor

AT45DB021E 2-Mbit DataFlash (with Extra 64 kbits) 1.65 V Minimum SPI Serial Flash Memory Features Single 1.65 V - 3.6 V supply Serial Peripheral Interface (SPI) compatible - Supports SPI modes 0 and 3 - Supports RapidS operation Continuous read capability through entire array - Up to 85 MHz - Low-power read option up to 15 MHz - Clock-to-output time (t ) of 6 ns maximum V User-configurable page size - 256 bytes per page - 264 bytes per page (default) - Page size can be factory pre-configured for 256 bytes One SRAM data buffer (256/264 bytes) Flexible programming options - Byte/Page Program (1 to 256/264 bytes) directly into main memory - Buffer Write - Buffer to Main Memory Page Program Flexible erase options - Page Erase (256/264 bytes) - Block Erase (2 kB) - Sector Erase (32 kB) - Chip Erase (2 Mbits) Program and Erase Suspend/Resume Advanced hardware and software data protection features - Individual sector protection - Individual sector lockdown to make any sector permanently read-only 128-byte, One-Time Programmable (OTP) Security Register - 64 bytes factory programmed with a unique identifier - 64 bytes user programmable Hardware and software controlled reset options JEDEC Standard Manufacturer and Device ID Read Low power dissipation - 200 nA Ultra-Deep Power-Down current (typical) - 3 A Deep Power-Down current (typical) - 25 A Standby current (typical 20 MHz) - 4.5 mA Active Read current (typical)) Endurance: 100,000 program/erase cycles per page minimum Data retention: 20 years Complies with full industrial temperature range Green (Pb/Halide-free/RoHS compliant) packaging options - 8-lead SOIC (0.150 wide and 0.208 wide) - 8-pad Ultra-thin DFN (5 x 6 x 0.6mm) - 8-ball (6 x 4 Array) Wafer Level Chip Scale Package - Die in Wafer Form DS-AT45DB021E--8789I--7/2020Table of Contents 1. Description .5 2. Pin Configurations and Pinouts 6 3. Block Diagram .8 4. Memory Array .9 5. Device Operation .10 6. Read Commands .11 6.1 Continuous Array Read (Legacy Command: E8h) 11 6.2 Continuous Array Read (High Frequency Mode: 0Bh Opcode) 11 6.3 Continuous Array Read (Low Frequency Mode: 03h Opcode) 12 6.4 Continuous Array Read (Low Power Mode: 01h Opcode) 12 6.5 Main Memory Page Read . 13 6.6 Buffer Read . 13 7. Program and Erase Commands 14 7.1 Buffer Write . 14 7.2 Buffer to Main Memory Page Program with Built-In Erase 14 7.3 Buffer to Main Memory Page Program without Built-In Erase . 14 7.4 Main Memory Page Program through Buffer with Built-In Erase . 15 7.5 Main Memory Byte/Page Program through Buffer without Built-In Erase 15 7.6 Page Erase . 16 7.7 Block Erase . 16 7.8 Sector Erase 17 7.9 Chip Erase 18 7.10 Read-Modify-Write 19 8. Sector Protection .20 8.1 Software Sector Protection 20 8.1.1 Enable Sector Protection .20 8.1.2 Disable Sector Protection 21 8.2 Hardware Controlled Protection 21 8.3 Sector Protection Register 22 8.3.1 Erase Sector Protection Register 23 8.3.2 Program Sector Protection Register 23 8.3.3 Read Sector Protection Register .24 8.3.4 About the Sector Protection Register .25 9. Security Features .26 9.1 Sector Lockdown . 26 9.1.1 Read Sector Lockdown Register .27 9.1.2 Freeze Sector Lockdown .28 9.2 Security Register . 28 9.2.1 Programming the Security Register .28 9.2.2 Reading the Security Register .29 AT45DB021E 2 DS-AT45DB021E8789I7/2020