ESMT M52S32321A Revision History : Revision 1.0 (Oct. 31, 2006) - Original Revision 1.1 (Dec. 29, 2006) - Add -6 spec Revision 1.2 (Mar. 02, 2007) - Modify VOH and VOL - Delete BGA ball name of packing dimensions Revision 1.3 (May. 14,2007) - Modify tSS (1.5ns => 2ns) and tSH(1ns => 1.5ns) Revision 1.4 (Jul. 10,2007) - Modify type error Elite Semiconductor Memory Technology Inc. Publication Date : Jul. 2007 Revision : 1.4 1/29 ESMT M52S32321A SDRAM 512K x 32Bit x 2Banks Synchronous DRAM FEATURES GENERAL DESCRIPTION The M52S32321A is 33,554,432 bits synchronous high z 2.5V power supply data rate Dynamic RAM organized as 2 x 524,288 words by z LVCMOS compatible with multiplexed address 32 bits, fabricated with high performance CMOS technology. z Dual banks operation Synchronous design allows precise cycle control with the z MRS cycle with address key programs use of system clock I/O transactions are possible on every - CAS Latency (1, 2 & 3 ) clock cycle. Range of operating frequencies, programmable - Burst Length (1, 2, 4, 8 & full page) burst length and programmable latencies allow the same - Burst Type (Sequential & Interleave) device to be useful for a variety of high bandwidth, high z EMRS cycle with address key programs. performance memory system applications. z All inputs are sampled at the positive going edge of the system clock z Burst Read Single-bit Write operation ORDERING INFORMATION z Special Function Support. - PASR (Partial Array Self Refresh ) MAX Part NO. Package Comments - TCSR (Temperature compensated Self Refresh) Freq. - DS (Driver Strength) M52S32321A -10BG 100MHz 90 Ball VFBGA Pb-free z DQM for masking z Auto & self refresh M52S32321A -7.5BG 133MHz 90 Ball VFBGA Pb-free z 64ms refresh period (4K cycle) M52S32321A -6BG 166MHz 90 Ball VFBGA Pb-free PIN CONFIGURATION (TOP VIEW) 90 Ball FBGA 1 2 3 4 5 6 7 8 9 A DQ26 DQ24 VSS VDD DQ23 DQ21 B DQ28 VDDQVSSQ VDDQVSSQDQ19 C VSSQ DQ27 DQ25 DQ22 DQ20VDDQ D VSSQ DQ29 DQ30 DQ17 DQ18VDDQ E VDDQ DQ31 NC NC DQ16 VSSQ F VSS DQM3 A3 A2 DQM2VDD G A4 A5 A6 A10 A0 A1 H A7 A8 NC NC NC NC J CLK CKE A9 BA CS RAS K DQM1 NC NC DQM0 CAS WE L VDDQ DQ8 VSS VDD DQ7 VSSQ M VSSQ DQ10 DQ9 DQ6 DQ5 VDDQ N VSSQ DQ12 DQ14 DQ1 DQ3 VDDQ P DQ11 VDDQVSSQ VDDQVSSQ DQ4 R DQ13 DQ15 VSS VDD DQ0 DQ2 Elite Semiconductor Memory Technology Inc. Publication Date : Jul. 2007 Revision : 1.4 2/29