MB85R1001PFTN-GE1

FUJITSU SEMICONDUCTOR DS05-13103-5E DATA SHEET Memory FRAM CMOS 1 M Bit (128 K 8) MB85R1001 DESCRIPTIONS The MB85R1001 is an FRAM (Ferroelectric Random Access Memory) chip consisting of 131,072 words x 8 bits of non-volatile memory cells created using ferroelectric process and silicon gate CMOS process technologies. The MB85R1001 is able to retain data without using a back-up battery, as is needed for SRAM. 10 The memory cells used in the MB85R1001 can be used for at least 10 read/write operations, which is a significant 2 improvement over the number of read and write operations supported by Flash memory and E PROM. The MB85R1001 uses a pseudo-SRAM interface that is compatible with conventional asynchronous SRAM. FEATURES Bit configuration : 131,072 words 8bits 10 Read/write endurance : 10 times/bit (Min) Operating power supply voltage : 3.0 V to 3.6 V Operating temperature range : 20 C to + 85 C Data retention : 10 years ( + 55 C) Package : 48-pin plastic TSOP (1) Copyright2005-2007 FUJITSU LIMITED All rights reservedMB85R1001 PIN ASSIGNMENTS (TOP VIEW) A11 1 48 OE A9 2 47 NC NC 3 46 GND A8 4 45 A10 5 A13 44 CE1 6 WE 43 NC CE2 7 42 I/O8 A15 8 41 I/O7 NC 9 40 I/O6 VCC 10 39 I/O5 11 NC 38 I/O4 12 NC 37 VCC GND 13 36 NC NC 14 35 I/O3 NC 15 34 I/O2 VCC 16 33 I/O1 NC 17 32 NC 18 A16 31 NC A14 19 30 NC A12 20 29 A0 A7 21 28 A1 A6 22 27 GND A5 23 26 A2 24 A4 25 A3 (FPT-48P-M25) PIN DESCRIPTIONS Pin name Function A0 to A16 Address In I/O1 to I/O8 Data Input/Output CE1 Chip Enable 1 in CE2 Chip Enable 2 in WE Write Enable in OE Output Enable in VCC Power Supply GND Ground NC No Connection 2