Product Information

MB85RC512TPNF-G-JNERE1

MB85RC512TPNF-G-JNERE1 electronic component of Fujitsu Semiconductor

Datasheet
F-RAM 512kbit FRAM, I2C, 1.7V 3.6V - SOP8 T&R

Manufacturer: Fujitsu Semiconductor
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Price (USD)

1: USD 8.5399 ea
Line Total: USD 8.54

8808 - Global Stock
Ships to you between
Thu. 02 May to Mon. 06 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
3702 - Global Stock


Ships to you between Thu. 02 May to Mon. 06 May

MOQ : 1
Multiples : 1

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MB85RC512TPNF-G-JNERE1
Fujitsu Semiconductor

1 : USD 6.4055
10 : USD 5.8535
100 : USD 5.1175
250 : USD 5.0945
500 : USD 4.7725
1000 : USD 4.577
1500 : USD 4.416
3000 : USD 4.0595
9000 : USD 3.9445

     
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FUJITSU SEMICONDUCTOR DATA SHEET DS501-00028-5v0-E Memory FRAM 2 512K (64 K 8) Bit I C MB85RC512T DESCRIPTION The MB85RC512T is an FRAM (Ferroelectric Random Access Memory) chip in a configuration of 65,536 words 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC512T is able to retain data without using a data backup battery. The read/write endurance of the nonvolatile memory cells used for the MB85RC512T has improved to be 13 at least 10 cycles, significantly outperforming other nonvolatile memory products in the number. The MB85RC512T does not need a polling sequence after writing to the memory such as the case of Flash 2 memory or E PROM. FEATURES Bit configuration : 65,536 words 8 bits Two-wire serial interface : Fully controllable by two ports: serial clock (SCL) and serial data (SDA). Operating frequency : 3.4 MHz (Max HIGH SPEED MODE) 1 MHz (Max FAST MODE PLUS) 13 Read/write endurance : 10 times / byte Data retention : 10 years ( 85 C), 95 years ( 55 C) Operating power supply voltage: 1.7 V to 3.6 V Low-power consumption : Operating power supply current 0.71 mA (Typ 3.4 MHz) 1.2 mA (Max 3.4 MHz) Standby current 15 A (Typ) Sleep current 4 A (Typ) Operation ambient temperature range : 40 C to 85 C Package : 8-pin plastic SOP (FPT-8P-M02) RoHS compliant Copyright 2019 FUJITSU SEMICONDUCTOR LIMITED 2019.5MB85RC512T PIN ASSIGNMENT (TOP VIEW) A0 8 1 VDD A1 2 7 WP 6 A2 3 SCL VSS 4 5 SDA (FPT-8P-M02) PIN FUNCTIONAL DESCRIPTIONS Pin Pin Name Functional Description Number Device Address pins The MB85RC512T can be connected to the same data bus up to 8 devices. Device addresses are used in order to identify each of these devices. Connect 1 to 3 A0 to A2 these pins to VDD pin or VSS pin externally. Only if the combination of VDD and VSS pins matches Device Address Code inputted from the SDA pin, the device operates. In the open pin state, A0, A1 and A2 pins are internally pulled-down and recognized as the level. 4 VSS Ground pin Serial Data I/O pin This is an I/O pin which performs bidirectional communication for both memory 5SDA address and writing/reading data. It is possible to connect multiple devices. It is an open drain output, so a pull-up resistor is required to be connected to the ex- ternal circuit. Serial Clock pin 6SCL This is a clock input pin for input/output serial data. Data is sampled on the ris- ing edge of the clock and output on the falling edge. Write Protect pin When the Write Protect pin is the H level, the writing operation is disabled. When the Write Protect pin is the L level, the entire memory region can be 7WP overwritten. The reading operation is always enabled regardless of the Write Protect pin input level. The Write Protect pin is internally pulled down to VSS pin, and that is recognized as the L level (write enabled) when the pin is the open state. 8 VDD Supply Voltage pin 2 DS501-00028-5v0-E

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)

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