CY14V101QS 1-Mbit (128K 8) Quad SPI nvSRAM Temperature range Features Extended Industrial: 40 C to 105 C Density Industrial: 40 C to 85 C 1-Mbit (128K 8) Packages Bandwidth 16-pin SOIC 108-MHz high-speed interface 24-ball FBGA Read and write at 54 MBps Serial Peripheral Interface Functional Overview Clock polarity and phase modes 0 and 3 The Cypress CY14V101QS combines a 1-Mbit nvSRAM with a Multi I/O option Single SPI (SPI), Dual SPI (DPI), and Quad QPI interface. The QPI allows writing and reading the memory in SPI (QPI) either a single (one I/O channel for one bit per clock cycle), dual High reliability (two I/O channels for two bits per clock cycle), or quad (four I/O Infinite read, write, and RECALL cycles channels for four bits per clock cycle) through the use of selected opcodes. One million STORE cycles to nonvolatile elements (SONOS FLASH Quantum trap) The memory is organized as 128Kbytes each consisting of Data retention: 20 years at 85 C SRAM and nonvolatile SONOS Quantum Trap cells. The SRAM provides infinite read and write cycles, while the nonvolatile cells Read provide highly reliable storage of data. Data transfers from Commands: Standard, Fast, Dual I/O, and Quad I/O SRAM to the nonvolatile cells (STORE operation) take place Modes: Burst Wrap, Continuous (XIP) automatically at power-down. On power-up, data is restored to Write the SRAM from the nonvolatile cells (RECALL operation). You can also initiate the STORE and RECALL operations through Commands: Standard, Fast, Dual I/O, and Quad I/O SPI instructions. Modes: Burst Wrap Data protection Hardware: Through Write Protect Pin (WP) Software: Through Write Disable instruction Block Protection: Status Register bits to control protection Special instructions STORE/RECALL: Access data between SRAM and Quantum Trap Serial Number: 8-byte customer selectable (OTP) Identification Number: 4-byte Manufacturer ID and Product ID Store from SRAM to nonvolatile SONOS FLASH Quantum Trap AutoStore: Initiated automatically at power-down with a small capacitor (V ) CAP Software: Using SPI instruction (STORE) Hardware: HSB pin Recall from nonvolatile SONOS FLASH Quantum Trap to SRAM Auto RECALL: Initiated automatically at power-up Software: Using SPI instruction (RECALL) Low-power modes Sleep: Average current = 280 A at 85 C Hibernate: Average current = 8 A at 85 C Operating supply voltages Core V : 2.7 V to 3.6 V CC I/O V : 1.71 V to 2.0 V CCQ Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-85257 Rev. *M Revised May 5, 2017CY14V101QS Logic Block Diagram Serial Number Status Configuration Manufacturer ID Registers Product ID Nonvolatile Array (128K x 8) NC (I/O3) HSB STORE SPI/DPI/QPI SI (I/O0) RECALL Control Logic Memory Control SRAM CS Array Write Protection Address & Data (128K x 8) SCK Instruction Decoder WP (I/O2) SO (I/O1) SLEEP/HIBERNATE V CC Power Control V CCQ Block V SS V CAP Document Number: 001-85257 Rev. *M Page 2 of 55