CY7B9911V 3.3 V RoboClock+, High Speed Low Voltage Programmable Skew Clock Buffer 3.3 V RoboClock+, High Speed Low Voltage Programmable Skew Clock Buffer selectable control over system clock functions. These multiple Features output clock drivers provide the system integrator with functions necessary to optimize the timing of high performance computer All output pair skew <100 ps typical (250 max) systems. Each of the eight individual drivers, arranged in four 3.75 to 110 MHz output operation pairs of user controllable outputs, can drive terminated transmission lines with impedances as low as 50 . They deliver User selectable output functions minimal and specified output skews and full swing logic levels Selectable skew to 18 ns (LVTTL). Inverted and non-inverted 1 1 Each output is hardwired to one of nine delay or function Operation at and input frequency 2 4 configurations. Delay increments of 0.7 to 1.5 ns are determined Operation at 2x and 4x input frequency (input as low as by the operating frequency with outputs that can skew up to 6 3.75 MHz) time units from their nominal zero skew position. The completely Zero input-to-output delay integrated PLL allows external load and cancels the transmission line delay effects. When this zero delay capability 50% duty cycle outputs of the LVPSCB is combined with the selectable output skew LVTTL outputs drive 50 terminated lines functions, you can create output-to-output delays of up to 12 time units. Operates from a single 3.3 V supply Divide-by-two and divide-by-four output functions are provided Low operating current for additional flexibility in designing complex clock systems. When combined with the internal PLL, these divide functions 32-pin PLCC package allow distribution of a low frequency clock that are multiplied by Jitter 100 ps (typical) two or four at the clock destination. This facility minimizes clock distribution difficulty enabling maximum system clock speed and Functional Description flexibility. For a complete list of related documentation, click here. The CY7B9911V 3.3 V RoboClock+ High Speed Low Voltage Programmable Skew Clock Buffer (LVPSCB) offers user Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-07408 Rev. *I Revised January 22, 2015 CY7B9911V Logic Block Diagram TEST PHASE FB VCO AND FREQ FILTER TIME UNIT DET REF GENERATOR FS 4Q0 4F0 4F1 SELECT 4Q1 INPUTS (THREE SKEW LEVEL) 3Q0 3F0 3F1 3Q1 SELECT 2Q0 2F0 MATRIX 2F1 2Q1 1Q0 1F0 1F1 1Q1 Document Number: 38-07408 Rev. *I Page 2 of 18