Product Information

CY7C1021BNL-15VXC

CY7C1021BNL-15VXC electronic component of Infineon

Datasheet
SRAM 2Mb 15ns 64K x 16 LP Fast Asycn SRAM

Manufacturer: Infineon
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 2.6842 ea
Line Total: USD 2.68

35 - Global Stock
Ships to you between
Thu. 23 May to Wed. 29 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
35 - WHS 1


Ships to you between Thu. 23 May to Wed. 29 May

MOQ : 1
Multiples : 1
1 : USD 2.6842

     
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CY7C1021BN 1-Mbit (64 K 16) Static RAM 1-Mbit (64 K 16) Static RAM Features Functional Description Temperature ranges The CY7C1021BN is a high performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an Commercial: 0 C to 70 C automatic power down feature that significantly reduces power Industrial: 40 C to 85 C consumption when deselected. Automotive-A: 40 C to 85 C Writing to the device is accomplished by taking Chip Enable (CE) Automotive-E: 40 C to 125 C and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is High speed LOW, then data from the input/output (I/O) pins (I/O through 1 t = 15 ns (Automotive) AA I/O ), is written into the location specified on the address pins (A 8 0 through A ). If Byte High Enable (BHE) is LOW, then data from 15 Complementary metal oxide semiconductor (CMOS) for I/O pins (I/O through I/O ) is written into the location specified 9 16 optimum speed/power on the address pins (A through A ). 0 15 Low active power Reading from the device is accomplished by taking CE and 825 mW (maximum) Output Enable (OE) LOW while forcing WE HIGH. If BLE is LOW, then data from the memory location specified by the address pins Automatic power down when deselected appears on I/O to I/O . If BHE is LOW, then data from memory 1 8 Independent control of upper and lower bits appears on I/O to I/O . See the Truth Table on page 11 for a 9 16 complete description of read and write modes. Available in Pb-free and non Pb-free 44-pin TSOP II and 44-pin 400-mil-wide SOJ The I/O pins (I/O through I/O ) are placed in a high impedance 1 16 state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, WE LOW). The CY7C1021BN is available in standard 44-pin TSOP type II and 44-pin 400-mil-wide SOJ packages. Use part number CY7C1021BN when ordering 15 ns t . AA For a complete list of related resources, click here. Logic Block Diagram Data In Drivers A 7 A 6 A 64K x 16 5 A 4 I/O I/O RAM Array 1 8 A 3 512 X 2048 A I/O I/O 2 9 16 A 1 A 0 Column Decoder BHE WE CE OE BLE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-06494 Rev. *J Revised November 29, 2017 Row Decoder A 8 A 9 A 10 A 11 A 12 A 13 A 14 A 15 Sense AmpsCY7C1021BN Contents Selection Guide ................................................................3 Package Diagrams .......................................................... 13 Pin Configuration .............................................................3 Acronyms ........................................................................14 Pin Definitions ..................................................................4 Document Conventions ................................................. 14 Maximum Ratings .............................................................5 Units of Measure ....................................................... 14 Operating Range ...............................................................5 Document History Page ................................................. 15 Electrical Characteristics .................................................5 Sales, Solutions, and Legal Information ...................... 16 Capacitance ......................................................................6 Worldwide Sales and Design Support ....................... 16 Thermal Resistance ..........................................................6 Products ....................................................................16 AC Test Loads and Waveforms .......................................6 PSoC Solutions ...................................................... 16 Switching Characteristics ................................................7 Cypress Developer Community ................................. 16 Switching Waveforms ......................................................8 Technical Support ..................................................... 16 Truth Table ......................................................................11 Ordering Information ......................................................12 Ordering Code Definitions .........................................12 Document Number: 001-06494 Rev. *J Page 2 of 16

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
CYP
Cypress
Cypress / Spansion
CYPRESS SEMI
Cypress Semicon
Cypress Semiconductor
Cypress Semiconductor Corp
INF
INFINEON
Infineon IR
INFINEON (CYPRESS)
Infineon (IRF)
Infineon / Cypress
Infineon / IR
INFINEON TECH ICs
Infineon Technologies
INFINEON TECHNOLOGIES AG
Infineon Technologies Americas Corp.
Infinite Power Solutions
INTERNATIONAL RECTIF
INTERNATIONAL RECTIFIER
International Rectifier HiRel Products
INTL RECTIFIER
IR
IRH
Ramtron
Ramtron / Cypress Semiconductor
Ramtron International Corp
SP9
SPANSION

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