CY7C1071DV33 32-Mbit (2 M 16) Static RAM 32-Mbit (2 M 16) Static RAM Features Functional Description High speed The CY7C1071DV33 is a high performance CMOS Static RAM organized as 2,097,152 words by 16 bits. The input and output t = 12 ns AA pins (I/O through I/O ) are placed in a high impedance state 0 15 Low active power when: I = 250 mA at 83.3 MHz CC Deselected (CE HIGH) Low Complementary Metal Oxide Semiconductor (CMOS) Outputs are disabled (OE HIGH) standby power I = 50 mA SB2 Both byte high enable and byte low enable are disabled (BHE, BLE HIGH) Operating voltages of 3.3 0.3 V The write operation is active (CE LOW and WE LOW) 2.0 V data retention To write to the device, take Chip Enable (CE) and Write Enable Automatic power down when deselected (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O through I/O ) is written into the location TTL compatible inputs and outputs 0 7 specified on the address pins (A through A ). If Byte High 0 20 Available in Pb-free 48-ball FBGA package Enable (BHE) is LOW, then data from I/O pins (I/O through 8 I/O ) is written into the location specified on the address pins 15 (A through A ). 0 20 To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appears on I/O to I/O . If 0 7 Byte High Enable (BHE) is LOW, then data from memory appears on I/O to I/O . See the Truth Table on page 10 for a 8 15 complete description of read and write modes. For a complete list of related documentation, click here. Logic Block Diagram DATA IN DRIVERS 2M 16 A IO IO 0 7 (10:0) RAM ARRAY IO IO 8 15 COLUMN DECODER BHE A WE (20:11) CE OE BLE Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-12063 Rev. *J Revised November 18, 2014 ROW DECODER SENSE AMPSCY7C1071DV33 Contents Selection Guide ................................................................3 Ordering Information ...................................................... 10 Pin Configuration .............................................................3 Ordering Code Definitions ......................................... 10 Maximum Ratings .............................................................4 Package Diagram ............................................................ 11 Operating Range ...............................................................4 Acronyms ........................................................................12 DC Electrical Characteristics ..........................................4 Document Conventions ................................................. 12 Capacitance ......................................................................4 Units of Measure ....................................................... 12 Thermal Resistance ..........................................................4 Document History Page ................................................. 13 AC Test Loads and Waveforms .......................................5 Sales, Solutions, and Legal Information ...................... 14 Data Retention Characteristics .......................................5 Worldwide Sales and Design Support ....................... 14 AC Switching Characteristics .........................................6 Products ....................................................................14 Switching Waveforms ......................................................7 PSoC Solutions ......................................................... 14 Truth Table ......................................................................10 Document Number: 001-12063 Rev. *J Page 2 of 14