Data Sheet No. PD60213 revL IR2114SSPbF/IR2214SSPbF HALF-BRIDGE GATE DRIVER IC Features Product Summary Floating channel up to 600 V or 1200 V 600 V or V OFFSET Soft over-current shutdown 1200 V max. Synchronization signal to synchronize shutdown with the other phases I +/- (min) 1.0 A / 1.5 A O Integrated desaturation detection circuit V 10.4 V 20 V OUT Two stage turn on output for di/dt control Deadtime matching (max) 75 ns Separate pull-up/pull-down output drive pins Deadtime (typ) 330 ns Matched delay outputs Undervoltage lockout with hysteresis band Desat blanking time (typ) 3 s Lead free DSH, DSL input voltage 8.0 V threshold (typ) Description Soft shutdown time (typ) 9.25 s The IR2114/IR2214 gate driver family is suited to drive a single half bridge in power switching applications. These drivers provide high gate driving Package capability (2 A source, 3 A sink) and require low quiescent current, which allows the use of bootstrap power supply techniques in medium power systems. These drivers feature full short circuit protection by means of power transistor desaturation detection and manage all half-bridge faults by smoothly turning off the desaturated transistor through the dedicated soft shutdown pin, therefore preventing over-voltages and reducing electromagnetic emissions. In multi-phase systems, the IR2114/IR2214 drivers communicate using a dedicated local network (SY FLT and 24-Lead SSOP FAULT/SD signals) to properly manage phase-to-phase short circuits. The system controller may force shutdown or read device fault state through the 3.3 V compatible CMOS I/O pin (FAULT/SD). To improve the signal immunity from DC-bus noise, the control and power ground use dedicated pins enabling low-side emitter current sensing as well. Undervoltage conditions in floating and low voltage circuits are managed independently. Typical connection www.irf.com 14-Aug-09 2009 International Rectifier 1 IR2114/IR2214SSPbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to V , all currents are defined positive into any lead The thermal resistance SS and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V High side offset voltage V - 25 V + 0.3 S B B IR2114 -0.3 625 V High side floating supply voltage B IR2214 -0.3 1225 V High side floating output voltage (HOP, HON and SSDH) V - 0.3 V + 0.3 HO S B V Low side and logic fixed supply voltage -0.3 25 CC COM Power ground V - 25 V + 0.3 CC CC V V Low side output voltage (LOP, LON and SSDL) V -0.3 V + 0.3 LO COM CC VIN Logic input voltage (HIN, LIN and FLT CLR) -0.3 VCC + 0.3 Fault input/output voltage (FAULT/SD and SY FLT) V -0.3 V + 0.3 FLT CC V High side DS input voltage V -3 V + 0.3 DSH S B V Low side DS input voltage V -3 V + 0.3 DSL COM CC dVs/dt Allowable offset voltage slew rate 50 V/ns P Package power dissipation T 25 C 1.5 W D A Rth Thermal resistance, junction to ambient 65 C/W JA T Junction temperature 150 J T Storage temperature -55 150 S C T Lead temperature (soldering, 10 seconds) 300 L Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to VSS. The VS offset rating is tested with all supplies biased at a 15 V differential. Symbol Definition Min. Max. Units V High side floating supply voltage V + 11.5 V + 20 B S S IR2114 V 600 SS V High side floating supply offset voltage S IR2214 V 1200 SS V High side output voltage (HOP, HON and SSDH) V V + 20 HO S S V Low side output voltage (LOP, LON and SSDL) V V LO COM CC V Low side and logic fixed supply voltage (Note 1) 11.5 20 CC V COM Power ground -5 5 V Logic input voltage (HIN, LIN and FLT CLR) V V IN SS CC Fault input/output voltage (FAULT/SD and SY FLT) V V V FLT SS CC V High side DS pin input voltage V - 2.0 V DSH S B VDSL Low side DS pin input voltage VCOM - 2.0 VCC t High side pulse width for HIN input 1 s PWHIN T Ambient temperature -40 125 C A While internal circuitry is operational below the indicated supply voltages, the UV lockout disables the output drivers if the UV thresholds are not reached. A minimum supply voltage of 8V is recommended for the driver to operate safely under switching conditions at VS pin (please refer to the start-up sequence in application section of this document) Logic operational for V from V -5 V to V +600 V or 1200 V. Logic state held for V from V -5 V to V - S SS SS S SS SS V . For a negative spike on V (referenced to V ) of less than 200ns the IC will withstand a sustained peak BS B SS of -40V under normal operation and an isolated event of up to -70V peak spike (please refer to the Design Tip DT97-3 for more details). www.irf.com 2009 International Rectifier 2