Preliminary Data Sheet No. PD60034-J
(NOTE: For new designs, we
IR2151
recommend IRs new products IR2153 and IR21531)
SELF-OSCILLATING HALF-BRIDGE DRIVER
Features
Product Summary
Floating channel designed for bootstrap operation
V 600V max.
OFFSET
Fully operational to +600V
Tolerant to negative transient voltage
Duty Cycle 50%
dV/dt immune
Undervoltage lockout
I +/- 100 mA / 210 mA
O
Programmable oscillator frequency
1 V 10 - 20V
OUT
f =
1.4+(R 75 ) C
TT
Deadtime (typ.) 1.2 s
Matched propagation delay for both channels
Low side output in phase with R
T
Packages
Description
The IR2151 is a high voltage, high speed, self-os-
cillating power MOSFET and IGBT driver with both
high and low side referenced output channels. Pro-
prietary HVIC and latch immune CMOS technologies
enable ruggedized monolithic construction. The front
end features a programmable oscillator which is simi-
lar to the 555 timer. The output drivers feature a high
pulse current buffer stage and an internal deadtime
8 Lead PDIP
designed for minimum driver cross-conduction. Propa-
gation delays for the two channels are matched to sim- 8 Lead SOIC
plify use in 50% duty cycle applications. The floating
channel can be used to drive an N-channel power
MOSFET or IGBT in the high side configuration that
operates off a high voltage rail up to 600 volts.
Typical Connection
up to 600V
V V
CC B
TO
R HO
LOAD
T
C V
T S
COM LO
(Refer to Lead Assignment diagram for correct pin configuration)
1IR2151
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol Definition Min. Max. Units
V High side floating supply voltage -0.3 625
B
V High side floating supply offset voltage V - 25 V + 0.3
S B B
V High side floating output voltage V - 0.3 V + 0.3
HO S B
V Low side output voltage -0.3 V + 0.3
LO CC
V
V R voltage -0.3 V + 0.3
RT T CC
V C voltage -0.3 V + 0.3
CT T CC
I Supply current (note 1) 25
CC
mA
I R output current -5 5
RT T
dV /dt Allowable offset supply voltage transient 50 V/ns
s
P Package power dissipation @ T +25C (8 lead DIP) 1.0
D A
W
(8 lead SOIC) 0.625
R
JA Thermal resistance, junction to ambient (8 lead DIP) 125
C/W
(8 lead SOIC) 200
T Junction temperature 150
J
T Storage temperature -55 150 C
S
T Lead temperature (soldering, 10 seconds) 300
L
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V offset rating is tested with all supplies biased at 15V differential.
S
Symbol Definition Min. Max. Units
V High side sloating supply absolute voltage V + 10 V + 20
B S S
V High side floating supply offset voltage 600
S
V
V High side floating output voltage V V
HO S B
V Low side output voltage 0 V
LO CC
I Supply current (note 1) 5 mA
CC
T Ambient temperature -40 125 C
A
Note 1: Because of the IR2151s application specificity toward off-line supply systems, this IC contains a zener clamp
structure between the chip V and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC
CC
supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value
resistor connected between the chip V and the rectified line voltage and a local decoupling capacitor from
CC
V to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. There-
CC
fore, this circuit should not be driven by a DC, low impedance power source of greater than V .
CLAMP
2