MAX 10 FPGA Device Overview 2016.12.20 Send Feedback M10-OVERVIEW Subscribe MAX 10 devices are single-chip, non-volatile low-cost programmable logic devices (PLDs) to integrate the optimal set of system components. The highlights of the MAX 10 devices include: Internally stored dual configuration flash User flash memory Instant on support Integrated analog-to-digital converters (ADCs) Single-chip Nios II soft core processor support MAX 10 devices are the ideal solution for system management, I/O expansion, communication control planes, industrial, automotive, and consumer applications. Related Information MAX 10 FPGA Device Datasheet Key Advantages of MAX 10 Devices Table 1: Key Advantages of MAX 10 Devices Advantage Supporting Feature Simple and fast configuration Secure on-die flash memory enables device configuration in less than 10 ms Flexibility and integration Single device integrating PLD logic, RAM, flash memory, digital signal processing (DSP), ADC, phase-locked loop (PLL), and I/Os Small packages available from 3 mm 3 mm Low power Sleep modesignificant standby power reduction and resumption in less than 1 ms Longer battery liferesumption from full power-off in less than 10 ms 20-year-estimated life cycle Built on TSMC s 55 nm embedded flash process technology 2016 Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, NIOS, Quartus and Stratix words and logos are trademarks of Intel Corporation in the US and/or other countries. Other marks and brands may be claimed as the property of others. Intel warrants ISO performance of its FPGA and semiconductor products to current specifications in accordance with Intel s standard warranty, but reserves the right to make 9001:2008 changes to any products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any Registered information, product, or service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services. www.altera.com 101 Innovation Drive, San Jose, CA 95134M10-OVERVIEW 2 Summary of MAX 10 Device Features 2016.12.20 Advantage Supporting Feature High productivity design tools Quartus Prime Lite edition (no cost license) Qsys system integration tool Digital Signal Processing (DSP) Builder Nios II Embedded Design Suite (EDS) Summary of MAX 10 Device Features Table 2: Summary of Features for MAX 10 Devices Feature Description Technology 55 nm TSMC Embedded Flash (Flash + SRAM) process technology Packaging Low cost, small form factor packagessupport multiple packaging technologies and pin pitches Multiple device densities with compatible package footprints for seamless migration between different device densities RoHS6-compliant Core architecture 4-input look-up table (LUT) and single register logic element (LE) LEs arranged in logic array block (LAB) Embedded RAM and user flash memory Clocks and PLLs Embedded multiplier blocks General purpose I/Os Internal memory blocks M9K9 kilobits (Kb) memory blocks Cascadable blocks to create RAM, dual port, and FIFO functions User flash memory (UFM) User accessible non-volatile storage High speed operating frequency Large memory size High data retention Multiple interface option Embedded multiplier blocks One 18 18 or two 9 9 multiplier modes Cascadable blocks enabling creation of filters, arithmetic functions, and image processing pipelines MAX 10 FPGA Device Overview Altera Corporation Send Feedback