Product Information

IS62WV102416BLL-25TLI

IS62WV102416BLL-25TLI electronic component of ISSI

Datasheet
ISSI SRAM 16M (1Mx16) 25ns Async SRAM

Manufacturer: ISSI
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 22.379 ea
Line Total: USD 22.379

538 - Global Stock
Ships to you between
Thu. 11 Apr to Mon. 15 Apr
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
538 - Global Stock


Ships to you between Thu. 11 Apr to Mon. 15 Apr

MOQ : 1
Multiples : 1
1 : USD 22.379
10 : USD 21.1945
25 : USD 20.976
50 : USD 17.9975
96 : USD 17.94
288 : USD 17.94
1056 : USD 17.503
2592 : USD 17.4915

     
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Memory Size
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Maximum Clock Frequency
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Supply Voltage - Max
Supply Voltage - Min
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Hts Code
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IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL 1M x 16 HIGH-SPEED LOW POWER ASYNCHRONOUS CMOS STATIC RAM APRIL 2015 FEATURES DESCRIPTION High-speed access times: The ISSI IS62WV102416ALL/BLL and IS65WV102416BLL 25, 35 ns are high -speed, 16M-bit static RAMs organized as 1024K words by 16 bits. It is fabricated using ISSI s high-perfor - High-performance, low-power CMOS process mance CMOS technology. This highly reliable process Multiple center power and ground pins for greater coupled with innovative circuit design techniques, yields noise immunity high-performance and low power consumption devices. Easy memory expansion with CS1 and OE options When CS1 is HIGH (deselected) or when CS2 is LOW CS1 power-down (deselected) or when CS1 is LOW, CS2 is HIGH and both Fully static operation: no clock or refresh LB and UB are HIGH, the device assumes a standby mode required at which the power dissipation can be reduced down with TTL compatible inputs and outputs CMOS input levels. Single power supply Easy memory expansion is provided by using Chip Enable Vdd 1.65V to 2.2V (IS62WV102416ALL) and Output Enable inputs. The active LOW Write Enable speed = 35ns for Vdd 1.65V to 2.2V (WE) controls both writing and reading of the memory. A Vdd 2.4V to 3.6V (IS62/65WV102416BLL) data byte allows Upper Byte (UB) and Lower Byte (LB) speed = 25ns for Vdd 2.4V to 3.6V access. Packages available: 48-ball miniBGA (9mm x 11mm) The device is packaged in the JEDEC standard 48-pin 48-pin TSOP (Type I) TSOP Type I and 48-pin Mini BGA (9mm x 11mm). Industrial and Automotive Temperature Support Lead-free available Data control for upper and lower bytes FUNCTIONAL BLOCK DIAGRAM 1024K x 16 A0-A19 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CS1 OE CONTROL WE CIRCUIT UB LB Copyright 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published informa - tion and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. B 04/22/2015IS62WV102416ALL IS62WV102416BLL IS65WV102416BLL 1Mx16 LOW POWER PIN CONFIGURATIONS 48-Pin mini BGA (9mmx11mm) 1 2 3 4 5 6 A LB OE A0 A1 A2 CS2 I/O UB A3 A4 CS1 I/O B 8 0 I/O I/O A5 A6 I/O I/O C 9 10 1 2 GND A7 I/O11 A17 I/O3 VDD D VDD I/O NC A16 I/O GND 12 4 E I/O A14 I/O 14 I/O A15 5 I/O F 13 6 I/O A19 A12 A13 WE I/O G 15 7 A18 A8 A9 A10 A11 NC H PIN DESCRIPTIONS A0-A19 Address Inputs I/O0-I/O15 Data Inputs/Outputs CS1, CS2 Chip Enable Input OE Output Enable Input WE Write Enable Input LB Lower-byte Control (I/O0-I/O7) UB Upper-byte Control (I/O8-I/O15) NC No Connection Vdd Power GND Ground 2 Integrated Silicon Solution, Inc. www.issi.com Rev. B 04/22/2015

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
Integrated Silicon Solution
Integrated Silicon Solution ()
Integrated Silicon Solution (ISSI)
INTEGRATED SILICON SOLUTIONS INC
ISSI
ISSI(Integrated Silicon Solution)
ISSI, Integrated Silicon Solution Inc
Lumissil

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