Product Information


IS64C25616AL-12CTLA3-TR electronic component of ISSI

SRAM Chip Async Single 5V 4M-bit 256K x 16 12ns Automotive 44-Pin TSOP-II T/R

Manufacturer: ISSI
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges

Price (USD)

1000: USD 8.2737 ea
Line Total: USD 8273.7

0 - Global Stock
MOQ: 1000  Multiples: 1000
Pack Size: 1000
Availability Price Quantity
0 - Global Stock

Ships to you between Wed. 11 Oct to Tue. 17 Oct

MOQ : 1000
Multiples : 1000
1000 : USD 10.5865

0 - Global Stock

Ships to you between Wed. 11 Oct to Tue. 17 Oct

MOQ : 1000
Multiples : 1000
1000 : USD 8.2737
2000 : USD 7.784

Product Category
Memory Size
4 mb it
Access Time
12 ns
Supply Voltage - Max
5.5 V
Supply Voltage - Min
4.5 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
Package / Case
Supply Current - Max
55 mA
Data Rate
Factory Pack Quantity :
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IS61C25616AL IS61C25616AS IS64C25616AL IS64C25616AS 256K x 16 HIGH-SPEED CMOS STATIC RAM MARCH 2008 FEATURES DESCRIPTION The ISSI IS61C25616AL/AS and IS64C25616AL/AS are HIGH SPEED: (IS61/64C25616AL) high-speed, 4,194,304-bit static RAMs organized as 262,144 High-speed access time: 10ns, 12 ns words by 16 bits. They are fabricated using ISSI s high- Low Active Power: 150 mW (typical) performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields Low Standby Power: 10 mW (typical) access times as fast as 12 ns with low power consumption. CMOS standby LOW POWER: (IS61/64C25616AS) When CE is HIGH (deselected), the device assumes a High-speed access time: 25 ns standby mode at which the power dissipation can be reduced down with CMOS input levels. Low Active Power: 75 mW (typical) Low Standby Power: 1 mW (typical) Easy memory expansion is provided by using Chip Enable CMOS standby and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. TTL compatible interface levels A data byte allows Upper Byte (UB) and Lower Byte (LB) Single 5V 10% power supply access. Fully static operation: no clock or refresh required The IS61C25616AL/AS and IS64C25616AL/AS are pack- aged in the JEDEC standard 44-pin 400-mil SOJ and 44-pin Available in 44-pin SOJ package and TSOP (Type II). 44-pin TSOP (Type II) Commercial, Industrial and Automotive tempera- ture ranges available Lead-free available FUNCTIONAL BLOCK DIAGRAM 256K x 16 A0-A17 DECODER MEMORY ARRAY VDD GND I/O0-I/O7 I/O Lower Byte COLUMN I/O DATA CIRCUIT I/O8-I/O15 Upper Byte CE OE CONTROL WE CIRCUIT UB LB Copyright 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. 1 Rev. C 03/21/2008IS61C25616AL IS61C25616AS IS64C25616AL IS64C25616AS PIN CONFIGURATIONS 44-Pin TSOP (Type II) 44-Pin SOJ A15 1 44 A0 A15 1 44 A0 A14 2 43 A1 A14 2 43 A1 A13 3 42 A2 A13 3 42 A2 A12 4 41 OE A12 4 41 OE A11 5 40 UB A11 5 40 UB CE 6 39 LB CE 6 39 LB I/O0 7 38 I/O15 I/O0 7 38 I/O15 I/O1 8 37 I/O14 I/O1 8 37 I/O14 I/O2 9 36 I/O13 I/O2 9 36 I/O13 I/O3 10 35 I/O12 I/O3 10 35 I/O12 VDD 11 34 GND VDD 11 34 GND GND 12 33 VDD GND 12 33 VDD I/O4 13 32 I/O11 I/O4 13 32 I/O11 I/O5 14 31 I/O10 I/O5 14 31 I/O10 I/O6 15 30 I/O9 I/O6 15 30 I/O9 I/O7 16 29 I/O8 I/O7 16 29 I/O8 WE 17 28 NC WE 17 28 NC A10 18 27 A3 A10 18 27 A3 A9 19 26 A4 A9 19 26 A4 A8 20 25 A5 A8 20 25 A5 A7 21 24 A6 A7 21 24 A6 A16 22 23 A17 A16 22 23 A17 PIN DESCRIPTIONS A0-A17 Address Inputs LB Lower-byte Control (I/O0-I/O7) I/O0-I/O15 Data Inputs/Outputs UB Upper-byte Control (I/O8-I/O15) CE Chip Enable Input NC No Connection OE Output Enable Input VDD Power WE Write Enable Input GND Ground 2 Integrated Silicon Solution, Inc. Rev. C 03/21/2008

Tariff Desc

8542.32.00 31 No ..Random Access Memory (RAM) including Single Inline Memory Modules (SIMMS), Dual Inline Memory Modules (DIMMS), Dynamic Random Access Memory (DRAM), Synchronous Dynamic Random Access Memory (SD RAM), Rambus Dynamic Random Access Memory (RD RAM) and other similar memory
Integrated Silicon Solution
Integrated Silicon Solution ()
Integrated Silicon Solution (ISSI)
ISSI(Integrated Silicon Solution)
ISSI, Integrated Silicon Solution Inc