MX25L3206EM2I-12G TR Macronix

MX25L3206EM2I-12G TR electronic component of Macronix
MX25L3206EM2I-12G TR Macronix
MX25L3206EM2I-12G TR NOR Flash
MX25L3206EM2I-12G TR  Semiconductors
Images are for reference only, See Product Specifications

X-On Electronics has gained recognition as a prominent supplier of MX25L3206EM2I-12G TR NOR Flash across the USA, India, Europe, Australia, and various other global locations. MX25L3206EM2I-12G TR NOR Flash are a product manufactured by Macronix. We provide cost-effective solutions for NOR Flash, ensuring timely deliveries around the world.

Part No. MX25L3206EM2I-12G TR
Manufacturer: Macronix
Category: NOR Flash
Description: FLASH SOP-8 RoHS
Datasheet: MX25L3206EM2I-12G TR Datasheet (PDF)
Price (USD)
2000: USD 0.7813 ea
Line Total: USD 1562.6 
Availability : 1940
  
Ship by Fri. 28 Nov to Thu. 04 Dec
QtyUnit Price
2000$ 0.7813

Availability 1940
Ship by Fri. 28 Nov to Thu. 04 Dec
MOQ : 2000
Multiples : 2000
QtyUnit Price
2000$ 0.7813

   
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Notes:- Show Stocked Products With Similar Attributes.

We are delighted to provide the MX25L3206EM2I-12G TR from our NOR Flash category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the MX25L3206EM2I-12G TR and other electronic components in the NOR Flash category and beyond.

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MX25L3206E MX25L3206E DATASHEET P/N: PM1568 REV. 1.5, DEC. 04, 2013 1MX25L3206E Contents FEATURES ..................................................................................................................................................................5 GENERAL DESCRIPTION .........................................................................................................................................6 PIN CONFIGURATIONS .............................................................................................................................................7 PIN DESCRIPTION ......................................................................................................................................................8 BLOCK DIAGRAM .......................................................................................................................................................9 MEMORY ORGANIZATION .......................................................................................................................................10 Table 1. Memory Organization .......................................................................................................................... 10 DEVICE OPERATION ................................................................................................................................................ 11 Figure 1. Serial Modes Supported ........................................................................................................11 DATA PROTECTION ..................................................................................................................................................12 Table 2. Protected Area Sizes ............................................................................................................................ 13 Table 3. 512 bits Secured OTP Definition ......................................................................................................... 13 HOLD FEATURES .....................................................................................................................................................14 Figure 2. Hold Condition Operation ........................................................................................................ 14 COMMAND DESCRIPTION .......................................................................................................................................15 Table 4. COMMAND DEFINITION ..................................................................................................................... 15 (1) Write Enable (WREN) ................................................................................................................................... 16 (2) Write Disable (WRDI) .................................................................................................................................... 16 (3) Read Status Register (RDSR) ...................................................................................................................... 16 (4) Write Status Register (WRSR) ...................................................................................................................... 17 Table 5. Protection Modes .................................................................................................................................. 18 (5) Read Data Bytes (READ) ............................................................................................................................. 19 (6) Read Data Bytes at Higher Speed (FAST READ) ....................................................................................... 19 (7) Dual Output Mode (DREAD) ......................................................................................................................... 19 (8) Sector Erase (SE) ......................................................................................................................................... 19 (9) Block Erase (BE) ........................................................................................................................................... 20 (10) Chip Erase (CE) .......................................................................................................................................... 20 (11) Page Program (PP) ..................................................................................................................................... 20 (12) Deep Power-down (DP) .............................................................................................................................. 21 (13) Release from Deep Power-down (RDP), Read Electronic Signature (RES) ............................................. 21 (14) Read Identification (RDID) .......................................................................................................................... 22 (15) Read Electronic Manufacturer ID & Device ID (REMS) .............................................................................. 22 Table 6. ID DEFINITIONS ................................................................................................................................. 22 (16) Enter Secured OTP (ENSO) ....................................................................................................................... 22 (17) Exit Secured OTP (EXSO) .......................................................................................................................... 22 (18) Read Security Register (RDSCUR) ............................................................................................................ 23 Table 7. SECURITY REGISTER DEFINITION ................................................................................................... 23 (19) Write Security Register (WRSCUR) ............................................................................................................ 23 P/N: PM1568 REV. 1.5, DEC. 04, 2013 2

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
Macronix International
MX7
MXA
MXIC(Macronix)
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