Product Information

PL123E-05HSI

PL123E-05HSI electronic component of Microchip

Datasheet
Clock Buffer Low Skew 1:5 Zero Delay Buffer

Manufacturer: Microchip
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

800: USD 1.5886 ea
Line Total: USD 1270.88

0 - Global Stock
MOQ: 800  Multiples: 800
Pack Size: 800
Availability Price Quantity
0 - WHS 1


Ships to you between Thu. 30 May to Mon. 03 Jun

MOQ : 700
Multiples : 700

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PL123E-05HSI
Microchip

700 : USD 1.564

     
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(Preliminary)PL123E-05 Low Skew Zero Delay Buffer FEATURES DESCRIPTION The PL123E-05 (-05H for High Drive) is a high perfor- Frequency Range 10MHz to 220MHz mance, low skew, low jitter zero delay buffer d esigned Zero input - output delay. to distribute high speed clocks. It has five low-skew Low output-to-output skew. outputs that are synchronized with the input. The syn- Optional Drive Strength: chronization is established via CLKOUT feed back to Standard (8mA) PL123E-05 the input of the PLL. Since the skew between the input High (12mA) PL123E-05H and output is less than 100ps, the device acts as a 2.5V or 3.3V, 10% operation. zero delay buffer. The input output propagation delay Available in 8-pin SOP packaging. can be advanced or delayed by adjusting the load on the CLKOUT pin. These parts are not intended for 5V input-tolerant ap- plications. PIN CONFIGURATION REF 1 8 CLKOUT CLK2 2 7 CLK4 CLK1 3 6 VDD GND 4 5 CLK3 SOP-8L BLOCK DIAGRAM REF CLKOUT PLL CLK1 CLK2 CLK3 CLK4 Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1(408) 944 -0800 fax +1(408) 474-1000 www.micrel.com Rev 12/13/11 Page 1 (Preliminary)PL123E-05 Low Skew Zero Delay Buffer PIN DESCRIPTION Package Type Name Type Description SOP-8L 1 REF 1 I Input reference frequency. 2 CLK2 2 O Buffered clock output. 2 CLK1 3 O Buffered clock output. GND 4 P Ground connection. 2 CLK3 5 O Buffered clock output. VDD 6 P VDD connection. 2 CLK4 7 O Buffered clock output. 2 ,3 CLKOUT 8 O Buffered clock output. Internal feed back on this pin. Notes: 1: Weak pull-down. 2: Weak pull-down on all outputs. 3. This output is driven and has an internal feedback for the PLL. The load on this output can be adjusted to change the skew between the reference and output. INPUT / OUTPUT SKEW CONTROL The PL123E-05 will achieve Zero Delay from input to output when all the outputs are loaded equally. Adjus t- ments to the input/output delay can be made by adjusting the loading on the CLKOUT pin. Please contact Micrel for more information. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1(408) 944 -0800 fax +1(408) 474-1000 www.micrel.com Rev 12/13/11 Page 2

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