8 Mbit SPI Serial Flash SST25VF080B SST25VF080B8Mb Serial Peripheral Interface (SPI) flash memory Data Sheet FEATURES: Single Voltage Read and Write Operations Auto Address Increment (AAI) Programming 2.7-3.6V Decrease total chip programming time over Byte-Program operations Serial Interface Architecture End-of-Write Detection SPI Compatible: Mode 0 and Mode 3 Software polling the BUSY bit in Status Register High Speed Clock Frequency Busy Status readout on SO pin in AAI Mode 50/66 MHz conditional (see Table 13) Hold Pin (HOLD ) - (SST25VF080B-50-xx-xxxx) 80 MHz Suspends a serial sequence to the memory - (SST25VF080B-80-xx-xxxx) without deselecting the device Superior Reliability Write Protection (WP ) Endurance: 100,000 Cycles (typical) Enables/Disables the Lock-Down function of the Greater than 100 years Data Retention status register Low Power Consumption: Software Write Protection Active Read Current: 10 mA (typical) Write protection through Block-Protection bits in Standby Current: 5 A (typical) status register Flexible Erase Capability Temperature Range Uniform 4 KByte sectors Commercial: 0C to +70C Uniform 32 KByte overlay blocks Industrial: -40C to +85C Uniform 64 KByte overlay blocks Packages Available Fast Erase and Byte-Program: 8-lead SOIC (200 mils) Chip-Erase Time: 35 ms (typical) 8-contact WSON (6mm x 5mm) Sector-/Block-Erase Time: 18 ms (typical) 8-lead PDIP (300 mils) Byte-Program Time: 7 s (typical) All devices are RoHS compliant PRODUCT DESCRIPTION SSTs 25 series Serial Flash family features a four-wire, The SST25VF080B devices significantly improve perfor- SPI-compatible interface that allows for a low pin-count mance and reliability, while lowering power consumption. package which occupies less board space and ultimately The devices write (Program or Erase) with a single power lowers total system costs. The SST25VF080B devices are supply of 2.7-3.6V for SST25VF080B. The total energy enhanced with improved operating frequency and lower consumed is a function of the applied voltage, current, and power consumption. SST25VF080B SPI serial flash mem- time of application. Since for any given voltage range, the ories are manufactured with SSTs proprietary, high-perfor- SuperFlash technology uses less current to program and mance CMOS SuperFlash technology. The split-gate cell has a shorter erase time, the total energy consumed during design and thick-oxide tunneling injector attain better reli- any Erase or Program operation is less than alternative ability and manufacturability compared with alternate flash memory technologies. approaches. The SST25VF080B device is offered in 8-lead SOIC (200 mils), 8-contact WSON (6mm x 5mm), and 8-lead PDIP (300 mils) packages. See Figure 2 for pin assignments. 2010 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc. S71296-04-000 01/10 These specifications are subject to change without notice. 18 Mbit SPI Serial Flash SST25VF080B Data Sheet SuperFlash X - Decoder Memory Address Buffers and Latches Y - Decoder I/O Buffers Control Logic and Data Latches Serial Interface 1296 B1.0 CE SCK SI SO WP HOLD FIGURE 1: Functional Block Diagram 2010 Silicon Storage Technology, Inc. S71296-04-000 01/10 2