SST26VF032B/SST26VF032BA
2.5V/3.0V 32-Mbit Serial Quad I/O (SQI) Flash Memory
Security ID:
Features
- One-Time Programmable (OTP) 2-KByte, Secure ID:
Single Voltage Read and Write Operations:
- 64-bit unique, factory preprogrammed identifier
- 2.7V-3.6V or 2.3V-3.6V
- User-programmable area
Serial Interface Architecture:
Temperature Range:
- Nibble-wide multiplexed I/Os with SPI-like serial
- Industrial: -40C to +85C
command structure
- Industrial Plus: -40C to +105C
- Mode 0 and Mode 3
- Extended: -40C to +125C
- x1/x2/x4 Serial Peripheral Interface (SPI) Protocol
Automotive AEC-Q100 Grade 1, Grade 2 and
High-Speed Clock Frequency:
Grade 3
- 2.7V-3.6V: 104 MHz maximum
Packages Available:
- 2.3V-3.6V: 80 MHz maximum
- 8-contact WDFN (6 mm x 5 mm)
Burst Modes:
- 8-lead SOIJ (5.28 mm)
- Continuous linear burst
- 24-ball TBGA (6 mm x 8 mm)
- 8/16/32/64 Byte linear burst with wrap-around
All Devices are RoHS Compliant
Superior Reliability:
- Endurance: 100,000 Cycles (minimum) Product Description
- Greater than 100 years Data Retention
The Serial Quad I/O (SQI) family of Flash memory
Low-Power Consumption:
devices features a six-wire, 4-bit I/O interface that allows for
- Active Read current: 15 mA (typical @ 104 MHz)
low-power, high-performance operation in a low pin-count
- Standby Current: 15 A (typical)
package. SST26VF032B/032BA also support full com-
Fast Erase Time: mand-set compatibility to traditional Serial Peripheral Inter-
face (SPI) protocol. System designs using SQI Flash
- Sector/Block Erase: 18 ms (typ), 25 ms
devices occupy less board space and ultimately lower
(maximum)
system costs.
- Chip Erase: 35 ms (typical), 50 ms (maximum)
Page-Program: All members of the 26 Series, SQI family are manufactured
with proprietary, high-performance CMOS SuperFlash
- 256 bytes per page in x1 or x4 mode
technology. The split-gate cell design and thick-oxide tun-
End-of-Write Detection:
neling injector attain better reliability and manufacturability
- Software polling BUSY bit in STATUS register
compared with alternate approaches.
Flexible Erase Capability:
SST26VF032B/032BA significantly improve performance
- Uniform 4-Kbyte sectors
and reliability, while lowering power consumption. These
- Four 8-KByte top and bottom parameter overlay
devices write (Program or Erase) with a single power supply
blocks
of 2.3-3.6V. The total energy consumed is a function of the
- One 32-Kbyte top and bottom overlay block
applied voltage, current, and time of application. Since for
- Uniform 64-Kbyte overlay blocks
any given voltage range, the SuperFlash technology uses
Write-Suspend:
less current to program and has a shorter erase time, the
total energy consumed during any Erase or Program opera-
- Suspend Program or Erase operation to access
tion is less than alternative Flash memory technologies.
another block/sector
Software Reset (RST) mode
Two configurations are available upon order.
SST26VF032B default at power-up has the WP# and
Software Write Protection:
HOLD# pins enabled, and the SIO2 and SIO3 pins
- Individual-Block Write Protection with permanent
disabled, to initiate SPI-protocol operations.
lock-down capability
SST26VF032BA default at power-up has the WP# and
- 64-Kbyte blocks, two 32-Kbyte blocks, and
HOLD# pins disabled, and the SIO2 and SIO3 pins
eight 8-Kbyte parameter blocks
enabled, to initiate Quad I/O operations. See
- Read Protection on top and bottom 8-Kbyte
Section 4.5.8 I/O Configuration (IOC) for more
parameter blocks
information about configuring WP#/HOLD# and SIO2/
SIO3 pins. See Figure 2-1 for pin assignments.
2013-2020 Microchip Technology Inc. DS20005218H-page 1SST26VF032B/SST26VF032BA
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