Product Information

SST26VF032BEUI-104I/SM

SST26VF032BEUI-104I/SM electronic component of Microchip

Datasheet
Serial Quad I/O Flash Memory with EUI-48 and EUI-64 Identifier 32Mbit 104MHz 2.5V/3V 8-Pin SOIJ Tube

Manufacturer: Microchip
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Price (USD)

1: USD 2.9347 ea
Line Total: USD 2.93

9 - Global Stock
Ships to you between
Tue. 07 May to Mon. 13 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
9 - Warehouse 1


Ships to you between Tue. 07 May to Mon. 13 May

MOQ : 1
Multiples : 1
1 : USD 2.9347
200 : USD 2.8802
400 : USD 2.8392
1000 : USD 2.7846
2500 : USD 2.73

1147 - Warehouse 2


Ships to you between Mon. 13 May to Wed. 15 May

MOQ : 1
Multiples : 1
1 : USD 2.9222
10 : USD 2.9222
25 : USD 2.9222
90 : USD 2.8135
270 : USD 2.8014

169 - Warehouse 3


Ships to you between Tue. 07 May to Mon. 13 May

MOQ : 1
Multiples : 1
1 : USD 4.8184
4 : USD 4.6546
5 : USD 4.5318
11 : USD 4.4089
25 : USD 4.3407

     
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SST26VF032BEUI 32 Mbit Serial Quad I/O (SQI) Flash Memory with EUI-48 and EUI-64 Identifier - 64 KByte blocks, two 32 KByte blocks, and Features eight 8 KByte parameter blocks Factory-Programmed with EUI-48 and EUI-64 - Read Protection on top and bottom 8 KByte Globally Unique Identifier parameter blocks - Secure, read-only access in Serial Flash Security ID Discoverable Parameter (SFDP) table - One-Time Programmable (OTP) 2 KByte, Secure ID Single Voltage Read and Write Operations - 64 bit unique, factory pre-programmed identifier - 2.7-3.6V or 2.3-3.6V - User-programmable area Serial Interface Architecture Temperature Range - Nibble-wide multiplexed I/Os with SPI-like serial - Industrial: -40C to +85C command structure Automotive AECQ-100 Qualified - Mode 0 and Mode 3 Packages Available - x1/x2/x4 Serial Peripheral Interface (SPI) Protocol - 8-lead SOIJ (5.28 mm) High Speed Clock Frequency All devices are RoHS compliant - 2.7-3.6V: 104 MHz max - 2.3-3.6V: 80 MHz max Product Description Burst Modes - Continuous linear burst The Serial Quad I/O (SQI) family of flash-memory - 8/16/32/64 Byte linear burst with wrap-around devices features a six-wire, 4-bit I/O interface that allows for low-power, high-performance operation in a low pin-count Superior Reliability package. SST26VF032BEUI also support full command-set - Endurance: 100,000 Cycles (min) compatibility to traditional Serial Peripheral Interface (SPI) - Greater than 100 years Data Retention protocol. System designs using SQI flash devices occupy Low Power Consumption: less board space and ultimately lower system costs. - Active Read current: 15 mA (typical 104 MHz) All members of the 26 Series, SQI family are manufactured - Standby Current: 15 A (typical) with proprietary, high-performance CMOS SuperFlash Fast Erase Time technology. The split-gate cell design and thick-oxide tun- - Sector/Block Erase: 18 ms (typ), 25 ms (max) neling injector attain better reliability and manufacturability - Chip Erase: 35 ms (typ), 50 ms (max) compared with alternate approaches. Page-Program SST26VF032BEUI significantly improve performance and - 256 Bytes per page in x1 or x4 mode reliability, while lowering power consumption. These devices End-of-Write Detection write (Program or Erase) with a single power supply of 2.3- 3.6V. The total energy consumed is a function of the applied - Software polling the BUSY bit in status register voltage, current, and time of application. Since for any given Flexible Erase Capability voltage range, the SuperFlash technology uses less current - Uniform 4 KByte sectors to program and has a shorter erase time, the total energy - Four 8 KByte top and bottom parameter overlay consumed during any Erase or Program operation is less blocks than alternative flash memory technologies. - One 32 KByte top and bottom overlay block SST26VF032BEUI is offered in 8-lead SOIJ (5.28 mm). - Uniform 64 KByte overlay blocks See Figure 2-1 for pin assignments. Write-Suspend SST26VF032BEUI default at power-up has the WP - Suspend Program or Erase operation to access and HOLD pins enabled, and the SIO2 and SIO3 another block/sector pins disabled, to initiate SPI-protocol operations.See Software Reset (RST) mode I/O Configuration (IOC) on page 11 for more Software Write Protection information about configuring WP /HOLD and SIO2/ - Individual-Block Write Protection with permanent SIO3 pins. lock-down capability 2019 Microchip Technology Inc. DS20006152A-page 1SST26VF032BEUI TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
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