Supertex inc. TP2104 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description High input impedance and high gain This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and Supertexs well- Low power drive requirement proven, silicon-gate manufacturing process. This combination Ease of paralleling produces a device with the power handling capabilities of Low C and fast switching speeds ISS bipolar transistors and the high input impedance and positive Excellent thermal stability temperature coefficient inherent in MOS devices. Characteristic Integral source-drain diode of all MOS structures, this device is free from thermal runaway Free from secondary breakdown and thermally-induced secondary breakdown. Applications Supertexs vertical DMOS FETs are ideally suited to a wide Logic level interfaces - ideal for TTL and CMOS range of switching and amplifying applications where very Solid state relays low threshold voltage, high breakdown voltage, high input Analog switches impedance, low input capacitance, and fast switching speeds Power management are desired. Telecom switches Ordering Information Product Summary R Part Number Package Option Packing V DS(ON) GS(th) BV /BV DSS DGS (max) (max) TP2104K1-G TO-236AB (SOT-23) 3000/Reel -40V 6.0 -2.0V TP2104N3-G 3-Lead TO-92 1000/Bag TP2104N3-G P002 Pin Configuration TP2104N3-G P003 TP2104N3-G P005 3-Lead TO-92 2000/Reel DRAIN TP2104N3-G P013 TP2104N3-G P014 DRAIN SOURCE -G denotes a lead (Pb)-free / RoHS compliant package. SOURCE Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. GATE GATE TO-236AB (SOT-23) TO-92 Absolute Maximum Ratings Parameter Value Product Marking Drain-to-source voltage BV DSS W = Code for week sealed Drain-to-gate voltage BV P1LW DGS = Green Packaging Gate-to-source voltage 20V Package may or may not include the following marks: Si or O O Operating and storage temperature -55 C to +150 C TO-236AB (SOT-23) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. SiTP YY = Year Sealed 2104 WW = Week Sealed Typical Thermal Resistance YYWW = Green Packaging Package Package may or may not include the following marks: Si or ja O TO-92 TO-236AB (SOT-23) 203 C/W O TO-92 132 C/W Doc. DSFP-TP2104 Supertex inc. B081313 www.supertex.comTP2104 Thermal Characteristics I I Power Dissipation D D Package I I O DR DRM (continuous) (pulsed) T = 25 C A TO-236AB (SOT-23) -160mA -800mA 0.36W -160mA -800mA TO-92 -175mA -1.0A 0.74W -175mA -1.0A I (continuous) is limited by max rated T . D j Electrical Characteristics (T = 25C unless otherwise specified) A Sym Parameter Min Typ Max Units Conditions BV Drain-to-source breakdown voltage -40 - - V V = 0V, I = -1.0mA DSS GS D V Gate threshold voltage -1.0 - -2.0 V V = V , I = -1.0mA GS(th) GS DS D O V Change in V with temperature - 5.8 6.5 mV/ C V = V , I = -1.0mA GS(th) GS(th) GS DS D I Gate body leakage - -1.0 -100 nA V = 20V, V = 0V GSS GS DS - -10 A V = 0V, V = Max Rating GS DS I Zero gate voltage drain current - DSS V = 0.8 Max Rating, DS - -1.0 mA V = 0V, T = 125C GS A I On-state drain current -0.6 - - A V = -10V, V = -25V D(ON) GS DS - 10 V = -4.5V, I = -50mA Static drain-to-source on-state GS D R - DS(ON) resistance - 6.0 V = -10V, I = -500mA GS D O R Change in R with temperature - 0.55 1.0 %/ C V = -10V, I = -500mA DS(ON) DS(ON) GS D G Forward transconductance 150 200 - mmho V = -25V, I = -500mA FS DS D C Input capacitance - 35 60 ISS V = 0V, GS C Common source output capacitance - 22 30 pF V = -25V, OSS DS f = 1.0 MHz C Reverse transfer capacitance - 8.0 10 RSS t Turn-on delay time - 4.0 6.0 d(ON) V = -25V, DD t Rise time - 4.0 8.0 r ns I = -500mA, D t Turn-off delay time - 5.0 9.0 d(OFF) R = 25 GEN t Fall time - 5.0 8.0 f V Diode forward voltage drop - -1.2 -2.0 V V = 0V, I = -500mA SD GS SD t Reverse recovery time - 400 - ns V = 0V, I = -500mA rr GS SD Notes: O 1. All D.C. parameters 100% tested at 25 C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V Pulse 10% Generator INPUT R GEN -10V 90% t t (ON) (OFF) D.U.T. t t t t d(ON) r d(OFF) f INPUT OUTPUT 0V 90% 90% R L OUTPUT 10% 10% VDD VDD Doc. DSFP-TP2104 Supertex inc. B081313 2 www.supertex.com