Product Information

ZL38005QCG1

Name: ZL38005QCG1
Brand: Microchip
SKU: ZL38005QCG1_Microchip
Availability: OutOfStock
Rating: 5 (11 reviews)

ZL38005QCG1 electronic component of Microchip

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Communication ICs - Various pb Free Galileo Voice Processor

Manufacturer: Microchip

This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges

Price (USD)

1: USD 9.9888 ea
Line Total: USD 9.99

0 - Global Stock

MOQ: 1 Multiples: 1
Pack Size: 1

More Buying Options & Price Grid(s)

Availability	Price	Buy Price	Quantity
0 - Warehouse 1 Ships to you between Fri. 10 May to Tue. 14 May MOQ : 450 Multiples : 450 ZL38005QCG1 Microchip	450 : USD 11.212

0 - Warehouse 2 Ships to you between Mon. 06 May to Fri. 10 May MOQ : 1 Multiples : 90 ZL38005QCG1 Microchip	1 : USD 16.3343 3 : USD 14.8766

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Additional Infomation About Product

ZL38005 Enhanced Voice Processor with Dual Wideband Codecs Data Sheet November 2012 A full Design Manual is available to qualified customers. To register, please send an email to Ordering Information VoiceProcessing Zarlink.com. ZL38005QCG1 100 Pin LQFP* Trays, Bake & Features Drypack ZL38005GGG2 96 Pin VFBGA* Trays, Bake & 100 MHz (200 MIPs) Microsemi voice processor Drypack with hardware accelerator. *Pb Free Matte Tin -40 C to +85 C Dual narrow band (8 KHz) ADCs with input buffer gain selection External oscillator or crystal/ceramic resonator Dual narrow band (8 KHz) DACs 1.2 V Core 3.3 V IO with 5 V-tolerant inputs 2 Dual function Inter-IC Sound (I S) port IEEE-1149.1 compatible JTAG port PCM port supports TDM (ST BUS, GCI or McBSP framing) or SSI modes at bit rates of 128, 256, 512, Applications 1024, 2048, 4096, 8192 or 16384 Kb/sec Hands-free car kits Separate slave (microcontroller) and master (Flash) SPI ports, maximum clock rate = 25 MHz Full duplex speaker-phone for digital telephone 11 General Purpose Input/Output (GPIO) pins Echo cancellation for video conferences General purpose UART port Intercom Systems Bootloadable for future Microsemi software Security Systems upgrades Buffer OSCo CODEC 0 APLL OSC Interrupt OSCi Instruction ADC Controller PCM CLKi Memory DAC PCM LBCi PCM P0 ROM Clock Driver JTAG DSP Buffer Core RAM Timing CODEC 1 Generator ADC DAC Master SPI Data RAM Hardware Driver Accelerator Slave PCM P0 SPI IRQ UART 2 I S GPIO Figure 1 - Functional Block Diagram 1 Copyright 2012, Microsemi Corporation. All Rights Reserved.ZL38005 Data Sheet Change Summary Changes from August 2011 issue to November 2012 issue. Page, section, figure and table numbers refer to this current issue. Page Item Change Multiple Zarlink logo and name reference Updated to Microsemi logo and name. Changes from September 2007 issue to August 2011 issue. Page, section, figure and table numbers refer to this current issue. Page Item Change 1 Ordering Information Changed 96 Pin CABGA to 96 Pin VFBGA. 9 Package Drawing Updated 96L VFBGA package drawing. 1.0 Functional Description The ZL38005 is a hardware platform designed to support advanced acoustic echo canceller (with noise reduction) firmware applications available from Microsemi. These applications are resident in external memory and are down- loaded by the ZL38005 resident boot code during initialization. The firmware product and manual available at the release of this data sheet is the ZLS38501: Acoustic Echo Canceller with Noise Reduction. If these applications do not meet your requirements, please contact your local Microsemi CMPG Sales Office for the latest firmware releases. The ZL38005 Advanced Acoustic Echo Canceller with Noise Reduction platform integrates Microsemis Voice Processor (ZVP) DSP Core with a number of internal peripherals. These peripherals include the following: Two independent CODECs Two PCM ports - ST BUS, GCI, McBSP or SSI operation 2 An I S interface port A 2048 tap Filter Co-processor (LMS, FIR and FAP realizations) Two Auxiliary Timers and a Watchdog Timer 11 GPIO pins A UART interface A Slave SPI port and a Master SPI port A timing block that supports master and slave operation An IEEE - 1149.1 compatible JTAG port The DSP Core can process up to four 8-bit audio channels, two 16-bit audio channels or two 8-bit and one 16-bit audio channel. These audio channels may originate and terminate with the CODECs, or be communicated to 2 and from the DSP Core through the PCM ports or the I S port. 2 Microsemi Corporation

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

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