N25Q256A33EF840F

3V, 256Mb: Multiple I/O Serial Flash Memory Features Micron Serial NOR Flash Memory 3V, Multiple I/O, 4KB Sector Erase N25Q256A Write protection Features Software write protection applicable to every SPI-compatible serial bus interface 64KB sector via volatile lock bit Double transfer rate (DTR) mode Hardware write protection: protected area size 2.73.6V single supply voltage defined by five nonvolatile bits (BP0, BP1, BP2, 108 MHz (MAX) clock frequency supported for all BP3, and TB) protocols in single transfer rate (STR) mode Additional smart protections, available upon re- 54 MHz (MAX) clock frequency supported for all quest protocols in DTR mode Electronic signature Dual/quad I/O instruction provides increased JEDEC-standard 2-byte signature (BA19h) throughput up to 54 MB/s Unique ID of 17 read-only bytes including: addi- Supported protocols tional extended device ID (EDID) to identify de- Extended SPI, dual I/O, and quad I/O vice factory options customized factory data DTR mode supported on all Minimum 100,000 ERASE cycles per sector Execute-in-place (XIP) mode for all three protocols More than 20 years data retention Configurable via volatile or nonvolatile registers Packages JEDEC standard, all RoHS compliant Enables memory to work in XIP mode directly af- V-PDFN-8/8mm x 6mm (also known as SON, ter power-on DFPN, MLP, MLF) PROGRAM/ERASE SUSPEND operations SOP2-16/300mils (also known as SO16W, SO16- Continuous read of entire memory via a single com- Wide, SOIC-16) mand T-PBGA-24b05/6mm x 8mm (also known as Fast read TBGA24) Quad or dual output fast read Quad or dual I/O fast read Flexible to fit application Configurable number of dummy cycles Output buffer configurable Software reset 3-byte and 4-byte addressability mode supported 64-byte, user-lockable, one-time programmable (OTP) dedicated area An additional reset pin is available on the following devices N25Q256A83ESF40x, N25Q256A83E1240x, N25Q256A83ESFA0F Erase capability Subsector erase 4KB uniform granularity blocks Sector erase 64KB uniform granularity blocks Full-chip erase 09005aef84566603 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 n25q 256mb 65nm.pdf - Rev. X 06/18 EN 2011 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.3V, 256Mb: Multiple I/O Serial Flash Memory Features Contents Important Notes and Warnings ......................................................................................................................... 6 Device Description ........................................................................................................................................... 7 Features ....................................................................................................................................................... 7 3-Byte Address and 4-Byte Address Modes ..................................................................................................... 7 Operating Protocols ...................................................................................................................................... 7 XIP Mode ..................................................................................................................................................... 7 Device Configurability .................................................................................................................................. 8 Signal Assignments ........................................................................................................................................... 9 Signal Descriptions ......................................................................................................................................... 11 Memory Organization .................................................................................................................................... 13 Memory Configuration and Block Diagram .................................................................................................. 13 Memory Map 256Mb Density ....................................................................................................................... 14 Device Protection ........................................................................................................................................... 15 Block Protection Areas ................................................................................................................................ 16 Serial Peripheral Interface Modes .................................................................................................................... 18 SPI Protocols .................................................................................................................................................. 20 Nonvolatile and Volatile Registers ................................................................................................................... 21 Status Register ............................................................................................................................................ 22 Nonvolatile and Volatile Configuration Registers .......................................................................................... 22 Extended Address Register .......................................................................................................................... 26 Enhanced Volatile Configuration Register .................................................................................................... 27 Flag Status Register ..................................................................................................................................... 27 Command Definitions .................................................................................................................................... 29 READ REGISTER and WRITE REGISTER Operations ........................................................................................ 33 READ STATUS REGISTER or FLAG STATUS REGISTER Command ................................................................ 33 READ NONVOLATILE CONFIGURATION REGISTER Command ................................................................... 33 READ VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command .................................. 34 READ EXTENDED ADDRESS REGISTER Command ..................................................................................... 34 WRITE STATUS REGISTER Command ......................................................................................................... 34 WRITE NONVOLATILE CONFIGURATION REGISTER Command ................................................................. 35 WRITE VOLATILE or ENHANCED VOLATILE CONFIGURATION REGISTER Command ................................. 35 WRITE EXTENDED ADDRESS REGISTER Command ................................................................................... 36 READ LOCK REGISTER Command .............................................................................................................. 36 WRITE LOCK REGISTER Command ............................................................................................................ 37 CLEAR FLAG STATUS REGISTER Command ................................................................................................ 38 READ IDENTIFICATION Operations ............................................................................................................... 39 READ ID and MULTIPLE I/O READ ID Commands ...................................................................................... 39 READ SERIAL FLASH DISCOVERY PARAMETER Command ......................................................................... 40 READ MEMORY Operations ............................................................................................................................ 44 3-Byte Address ........................................................................................................................................... 44 4-Byte Address ........................................................................................................................................... 46 READ MEMORY Operations Timing Single Transfer Rate ........................................................................... 47 READ MEMORY Operations Timing Double Transfer Rate ......................................................................... 51 PROGRAM Operations .................................................................................................................................... 54 WRITE Operations .......................................................................................................................................... 58 WRITE ENABLE Command ......................................................................................................................... 58 WRITE DISABLE Command ........................................................................................................................ 58 ERASE Operations .......................................................................................................................................... 60 SUBSECTOR ERASE Command ................................................................................................................... 60 SECTOR ERASE Command ......................................................................................................................... 60 09005aef84566603 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 n25q 256mb 65nm.pdf - Rev. X 06/18 EN 2011 Micron Technology, Inc. All rights reserved.