Product Information

74AHC30D-Q100J

74AHC30D-Q100J electronic component of Nexperia

Datasheet
Logic Gates 8-input NAND gate

Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.9219 ea
Line Total: USD 0.92

148 - Global Stock
Ships to you between
Thu. 09 May to Mon. 13 May
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
2466 - Global Stock


Ships to you between Thu. 09 May to Mon. 13 May

MOQ : 1
Multiples : 1

Stock Image

74AHC30D-Q100J
Nexperia

1 : USD 0.6424
10 : USD 0.5144
100 : USD 0.3876
500 : USD 0.3369
1000 : USD 0.2681
2500 : USD 0.2246
10000 : USD 0.2246
25000 : USD 0.2222

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Product
Logic Function
Logic Family
Number of Gates
Number of Input Lines
Number of Output Lines
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Operating Temperature Range
Output Current
Output Voltage
Brand
Pd - Power Dissipation
Factory Pack Quantity :
Cnhts
Hts Code
Mxhts
Product Type
Subcategory
Taric
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74AHC30-Q100 74AHCT30-Q100 8-input NAND gate Rev. 2 6 May 2020 Product data sheet 1. General description The 74AHC30-Q100 74AHCT30-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC30-Q100 74AHCT30-Q100 provides an 8-input NAND function. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than V CC Input levels: For 74AHC30-Q100: CMOS level For 74AHCT30-Q100: TTL level ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature Name Description Version range 74AHC30D-Q100 -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74AHCT30D-Q100 74AHC30PW-Q100 -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74AHCT30PW-Q100 74AHC30BQ-Q100 -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal SOT762-1 enhanced very thin quad flat package no leads 74AHCT30BQ-Q100 14 terminals body 2.5 3 0.85 mmNexperia 74AHC30-Q100 74AHCT30-Q100 8-input NAND gate 4. Marking Table 2. Marking codes Type number Marking 74AHC30D-Q100 74AHC30D 74AHCT30D-Q100 74AHCT30D 74AHC30PW-Q100 AHC30 74AHCT30PW-Q100 AHCT30 74AHC30BQ-Q100 AHC30 74AHCT30BQ-Q100 AHT30 5. Functional diagram 1 A 1 & 2 B 2 3 C 3 4 D 4 8 Y 8 5 E 5 6 F 6 11 G 11 12 H 12 mna488 mna489 Fig. 1. Logic symbol Fig. 2. IEC logic symbol A B C D Y E mna490 F G H Fig. 3. Logic diagram 74AHC AHCT30 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 2 6 May 2020 2 / 14

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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