Product Information

74AHC374PW-Q100J

74AHC374PW-Q100J electronic component of Nexperia

Datasheet
Flip Flops Octal Dtype flipflop positive edgetrigger
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.9045 ea
Line Total: USD 0.9

0 - Global Stock
MOQ: 1  Multiples: 1
Pack Size: 1

 More Buying Options & Price Grid(s)

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0 - Warehouse 1


Ships to you between Fri. 10 May to Tue. 14 May

MOQ : 1
Multiples : 1
1 : USD 0.5048
10 : USD 0.4358
100 : USD 0.3289
500 : USD 0.2657
1000 : USD 0.2116
2500 : USD 0.1944
10000 : USD 0.1782
25000 : USD 0.176
50000 : USD 0.1714

Read More Specifications

     
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RoHS - XON
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Number of Circuits
Logic Family
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Output Type
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Supply Voltage - Min
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Additional Infomation About Product

74AHC374-Q100 74AHCT374-Q100 Octal D-type flip-flop positive edge-trigger 3-state Rev. 1 11 March 2014 Product data sheet 1. General description The 74AHC374-Q100 74AHCT374-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC374-Q100 74AHCT374-Q100 comprises eight D-type flip-flops featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. A clock input (CP) and an output enable input (OE) are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the set-up and hold times requirements for the LOW-to-HIGH CP transition. When OE is LOW the content of the eight flip-flops is available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than V CC Common 3-state output enable input Input levels: For 74AHC374-Q100: CMOS level For 74AHCT374-Q100: TTL level ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options74AHC374-Q100 74AHCT374-Q100 Nexperia Octal D-type flip-flop positive edge-trigger 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC374-Q100 74AHC374D-Q100 40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74AHC374PW-Q100 40 C to +125 C TSSOP20 plastic thin shrink small outline package SOT360-1 20 leads body width 4.4 mm 74AHCT374-Q100 74AHCT374D-Q100 40 C to +125 C SO20 plastic small outline package 20 leads SOT163-1 body width 7.5 mm 74AHCT374PW-Q100 40 C to +125 C TSSOP20 plastic thin shrink small outline package SOT360-1 20 leads body width 4.4 mm 4. Functional diagram 3 D0 Q0 2 Q1 4 D1 5 7 D2 Q2 6 FF1 Q3 8 D3 9 3-STATE to 13 D4 Q4 12 OUTPUTS FF8 14 D5 Q5 15 17 Q6 16 D6 18 D7 Q7 19 11 CP 1 OE mna892 Fig 1. Functional diagram 74AHC AHCT374 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 1 11 March 2014 2 of 18

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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