Product Information

74AUP1T97UKAZ

74AUP1T97UKAZ electronic component of Nexperia

Datasheet
Logic Gates Low-power configurable gate with voltage-level translator
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete

 More Buying Options & Price Grid(s)

Availability Price Quantity
0 - Warehouse 1

MOQ : 1
Multiples : 1

Stock Image

74AUP1T97UKAZ
Nexperia

1 : USD 0.8311
10 : USD 0.7016
100 : USD 0.2123
250 : USD 0.1999
500 : USD 0.1719
1000 : USD 0.1388
2500 : USD 0.1284
5000 : USD 0.1211
9000 : USD 0.1211
N/A

Obsolete

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Product
Logic Function
Logic Family
Number of Gates
Number of Input Lines
Number of Output Lines
High Level Output Current
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Operating Temperature Range
Output Current
Output Voltage
Brand
Logic Type
Pd - Power Dissipation
Product Type
Factory Pack Quantity :
Subcategory
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Additional Infomation About Product

74AUP1T97 Low-power configurable gate with voltage-level translator Rev. 7 4 November 2021 Product data sheet 1. General description The 74AUP1T97 is a configurable multiple function gate with level translating, Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer using the 3-bit input. All inputs can be connected directly to V or GND. Low threshold Schmitt trigger inputs allow these devices to be driven by 1.8 V logic CC levels in 3.3 V applications. This device ensures very low static and dynamic power consumption across the entire V range from 2.3 V to 3.6 V. This device is fully specified for partial power down CC applications using I . The I circuitry disables the output, preventing the potentially damaging OFF OFF backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 2.3 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial power-down mode operation OFF Latch-up performance exceeds 100 mA per JESD 78 Class II Low static power consumption I = 1.5 A (maximum) CC Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3A exceeds 5000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74AUP1T97 Low-power configurable gate with voltage-level translator 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1T97GW -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74AUP1T97GM -40 C to +125 C XSON6 plastic extremely thin small outline package no leads SOT886 6 terminals body 1 1.45 0.5 mm 74AUP1T97GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74AUP1T97GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 74AUP1T97GX -40 C to +125 C X2SON6 plastic thermal enhanced extremely SOT1255-2 thin small outline package no leads 6 terminals body 1.0 0.8 0.32 mm 4. Marking Table 2. Marking Type number Marking code 1 74AUP1T97GW 59 74AUP1T97GM 59 74AUP1T97GN 59 74AUP1T97GS 59 74AUP1T97GX 59 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 3 A 4 Y 1 B 6 C 001aad998 Fig. 1. Logic symbol 74AUP1T97 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 7 4 November 2021 2 / 19

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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