Product Information

74HCT109D,652

74HCT109D,652 electronic component of Nexperia

Datasheet
Flip Flops DUAL J-K POS EDGE
Manufacturer: Nexperia
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
N/A

Obsolete

 More Buying Options & Price Grid(s)

Availability Price Quantity
0 - Warehouse 1

MOQ : 1000
Multiples : 1

Stock Image

74HCT109D,652
Nexperia

1000 : USD 0.2776
N/A

Obsolete
0 - Warehouse 2

MOQ : 1000
Multiples : 1000

Stock Image

74HCT109D,652
Nexperia

1000 : USD 0.217
3000 : USD 0.1992
10000 : USD 0.1954
25000 : USD 0.1928
50000 : USD 0.1877
100000 : USD 0.1814
N/A

Obsolete

Read More Specifications

     
Manufacturer
Product Category
RoHS - XON
Icon ROHS
Number of Circuits
Logic Family
Logic Type
Polarity
Input Type
Output Type
Propagation Delay Time
High Level Output Current
Low Level Output Current
Supply Voltage - Min
Supply Voltage - Max
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Brand
Number Of Input Lines
Number Of Output Lines
Factory Pack Quantity :
Function
Height
Length
Quiescent Current
Width
Number Of Channels
Cnhts
Hts Code
Mxhts
Operating Supply Voltage
Product Type
Reset Type
Subcategory
Taric
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Additional Infomation About Product

74HC109 74HCT109 Dual JK flip-flop with set and reset positive-edge-trigger Rev. 5 5 August 2021 Product data sheet 1. General description The 74HC109 74HCT109 is a dual positive edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) inputs, set (SD) and reset (RD) inputs and complementary Q and Q outputs. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The JK design allows operation as a D-type flip-flop by connecting the J and K inputs together. This device features reduced input threshold levels to allow interfacing to TTL logic levels. Inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of V . CC Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times. 2. Features and benefits J and K inputs for easy D-type flip-flop Toggle flip-flop ordo nothin mode Wide supply voltage range: For 74HC109: from 2.0 V to 6.0 V For 74HCT109: from 4.5 V to 5.5 V CMOS low power dissipation High noise immunity Input levels: For 74HC109: CMOS level For 74HCT109: TTL level Latch-up performance exceeds 100 mA per JESD 78 Class II Level B 74HC109 complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) 74HCT109 complies with JEDEC standard JESD7A (2.0 V to 6.0 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC109D -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT109D 74HC109PW -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74HCT109PWNexperia 74HC109 74HCT109 Dual JK flip-flop with set and reset positive-edge-trigger 4. Functional diagram 5 11 1SD 2SD 5 11 SD S S 2 1Q 6 1J J Q 2 14 14 2J 2Q 10 1J 1J 6 10 4 1CP CP 4 12 12 2CP C1 C1 FF 7 9 1Q 7 3 1K 3 13 K Q 1K 1K 13 2Q 9 2K RD 1 15 R R 1RD 2RD (a) (b) 1 15 mna858 mna856 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Q C C C C K Q J C C C C S R C CP C aaa-024066 Fig. 3. Logic diagram (one flip-flop) 74HC HCT109 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 5 5 August 2021 2 / 16

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

Nexperia may also be referenced as

Nexperia
NEXPERIA USA INC
Nexperia USA Inc.

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