74LV4051D,118 Nexperia

74LV4051 8-channel analog multiplexer/demultiplexer Rev. 8 16 July 2021 Product data sheet 1. General description The 74LV4051 is an 8-channel analog multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). It is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC4051 and 74HCT4051. With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. V and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). The V CC CC to GND ranges are 1.0 V to 6.0 V. The analog inputs/outputs (Y0 to Y7, and Z) can swing between V as a positive limit and V as a negative limit. V - V may not exceed 6.0 V. For operation CC EE CC EE as a digital multiplexer/demultiplexer, V is connected to GND (typically ground). EE 2. Features and benefits Optimized for low-voltage applications: 1.0 V to 6.0 V Accepts TTL input levels between V = 2.7 V and V = 3.6 V CC CC Low ON resistance: 145 (typical) at V - V = 2.0 V CC EE 80 (typical) at V - V = 3.0 V CC EE 60 (typical) at V - V = 4.5 V CC EE Logic level translation: To enable 3 V logic to communicate with 3 V analog signals Typical break before make built in ESD protection: HBM JESD22-A114E exceeds 2000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 C to +85 C and from -40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV4051D -40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74LV4051PW -40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74LV4051BQ -40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package no leads 16 terminals body 2.5 3.5 0.85 mmNexperia 74LV4051 8-channel analog multiplexer/demultiplexer 4. Functional diagram V CC 16 13 Y0 S0 11 14 Y1 15 Y2 S1 10 12 Y3 LOGIC 1 Y4 1-OF-8 LEVEL DECODER CONVERSION S2 9 5 Y5 2 Y6 E 6 4 Y7 3 Z 8 7 GND V 001aad543 EE Fig. 1. Functional diagram 11 0 10 0 8 X 9 7 2 6 G8 Y0 13 S0 Y1 MUX/DMUX 11 14 13 0 S1 Y2 10 15 14 1 S2 Y3 9 12 15 2 Y4 1 12 3 3 Y5 1 5 4 Y6 5 2 5 E Y7 2 6 6 4 3 4 7 Z 001aad541 001aad542 Fig. 2. Logic symbol Fig. 3. IEC logic symbol 74LV4051 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 8 16 July 2021 2 / 20