74LVC1G10GS,132 Nexperia

74LVC1G10 Single 3-input NAND gate Rev. 6 2 June 2021 Product data sheet 1. General description The 74LVC1G10 provides a low-power, low-voltage single 3-input NAND gate. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall time. This device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V). 24 mA output drive (V = 3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 V ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101E exceeds 1000 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 CNexperia 74LVC1G10 Single 3-input NAND gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G10GW -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 74LVC1G10GV -40 C to +125 C SC-74 plastic surface-mounted package 6 leads SOT457 TSOP6 74LVC1G10GM -40 C to +125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74LVC1G10GN -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74LVC1G10GS -40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 4. Marking Table 2. Marking Type number Marking code 1 74LVC1G10GW YM 74LVC1G10GV YM 74LVC1G10GM YM 74LVC1G10GN YM 74LVC1G10GS YM 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 A A 3 4 B Y 1 B Y & 6 C 3 4 6 C 001aag688 001aag686 001aag687 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram 74LVC1G10 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 6 2 June 2021 2 / 15