Product Information

74HC10N

74HC10N electronic component of NXP

Datasheet
74HC10N TRIPLE 3-INPUT NAND GATE DIP
Manufacturer: NXP
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)

1: USD 0.4361 ea
Line Total: USD 0.44

0 - Global Stock
Ships to you by
Mon. 06 May
MOQ: 1  Multiples: 1
Pack Size: 1

 More Buying Options & Price Grid(s)

Availability Price Quantity
0 - WHS 1


Ships to you by Mon. 06 May

MOQ : 1
Multiples : 1
1 : USD 0.4361
25 : USD 0.3945
50 : USD 0.3115
75 : USD 0.27
100 : USD 0.2596

Read More Specifications

     
Manufacturer
Product Category
Product
Logic Function
Logic Family
Number of Gates
Number of Input Lines
Number of Output Lines
High Level Output Current
Low Level Output Current
Propagation Delay Time
Supply Voltage - Max
Supply Voltage - Min
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Package / Case
Packaging
Brand
Logic Type
Factory Pack Quantity :
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Additional Infomation About Product

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT10 Triple 3-input NAND gate December 1990 Product specication File under Integrated Circuits, IC06Philips Semiconductors Product specication Triple 3-input NAND gate 74HC/HCT10 FEATURES Output capability: standard I category: SSI CC GENERAL DESCRIPTION The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT10 provide the 3-input NAND function. QUICK REFERENCE DATA GND = 0 V T =25C t =t = 6 ns amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC HCT t / t propagation delay nA, nB, nC to nY C = 15 pF V =5V 9 11 ns PHL PLH L CC C input capacitance 3.5 3.5 pF I C power dissipation capacitance per gate notes 1 and 2 12 14 pF PD Notes 1. C is used to determine the dynamic power dissipation (P in W): PD D 2 2 P =C V f + (C V f ) where: D PD CC i L CC O f = input frequency in MHz i f = output frequency in MHz o C = output load capacitance in pF L V = supply voltage in V CC 2 (C V f ) = sum of outputs L CC o 2. For HC the condition is V = GND to V I CC For HCT the condition is V = GND to V - 1.5 V. I CC ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS Logic Package Information. December 1990 2

HS Compliance

Tariff Desc

8542.39.23 No ..Linear/analogue and peripheral integrated circuits, timers, voltage regulators, A/D and D/A converters, telecommunication and modem integrated circuits, other than board level products Free

Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits

NXP may also be referenced as

FR9
Freescale
FREESCALE SEMI
Freescale Semicon
FREESCALE SEMICONDUC
Freescale Semiconductor
Freescale Semiconductor - NXP
NXP
NXP Freescale
NXP (FREESCALE)
NXP / Freescale
NXP SEMI
NXP Semicon
NXP SEMICONDUCTOR
NXP Semiconductors
NXP USA Inc.
PH3
PHI

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