74HCT7731D,112

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT7731 Quad 64-bit static shift register September 1993 Product specication File under Integrated Circuits, IC06Philips Semiconductors Product specication Quad 64-bit static shift register 74HC/HCT7731 FEATURES QUICK REFERENCE DATA GND = 0 V T = 25 C t = t = 6 ns. amb r f Frequency range DC to 100 MHz. Separate serial data inputs TYP. SYMBOL PARAMETER CONDITIONS UNIT Cascadable HC HCT Functionally compatible with t /t propagation delay C = 15 pF 15 20 ns PHL PLH L HEF 4731 CP to Q V = 5 V a-d a-d CC Includes recycling mode f maximum clock 100 100 MHz max frequency Direct shift out C input capacitance 3.5 3.5 pF Output capability: Standard I C power dissipation notes 1, 2 58 61 pF I category: LSI. PD CC capacitance per register and 3 APPLICATIONS Notes 1. C is used to determine the dynamic power dissipation (P in W): PD D Data storage 2 2 P = (C x V x f ) + (C + V x f ) + (I x V ) D PD CC i L CC o pull-up CC Delay line. where: f = input frequency in MHz. i GENERAL DESCRIPTION f = output frequency in MHz. o V = supply voltage in V. CC The HC/HCT7731 are high-speed C = output load capacitance in pF. L Si-gate CMOS devices. They are I = pull-up currents in A. pull-up specified in compliance with JEDEC standard no. 7A. 2. For HC the condition is V = GND to V The HC/HCT7731 are quad 64-bit I CC For HCT the condition is V = GND to V - 1.5 V. I CC static shift registers with a recycling mode. Each register has separate 3. See also power dissipation information. data inputs D to D , clock inputs CP a d a to CP and data outputs Q to Q . d a d ORDERING INFORMATION Data shifts one place towards the output, each LOW to HIGH transition PACKAGE EXTENDED TYPE of the clock pulse. Each recycling NUMBER PINS PIN POSITION MATERIAL CODE mode input controls two registers REC for registers A and B and ab 74HC/HCT7731N 16 DIL plastic SOT38Z REC for registers C and D. When cd 74HC/HCT7731D 16 SO16 plastic SOT109A the REC input is HIGH, the device is in the recycling mode and data at the output is shifted back into the input of the register, so after 64 clock pulses the contents of a register is again in its original position. This enables the user to tap off data from any position. When the REC input is LOW external data can be shifted in. September 1993 2