NXP Semiconductors Document Number: MC07XS3200 Rev. 4.0, 7/2016 Advance Information Dual high-side switch (7.0 mOhm) 07XS3200 The 07XS3200 is one in a family of SMARTMOS devices designed for low- voltage automotive lighting applications. Two low R MOSFETs (dual DS(on) 7.0 m) can control two separate 55 W/28 W bulbs, and/or Xenon modules, and/or LEDs. Programming, control and diagnostics are accomplished using a 16-bit SPI HIGH-SIDE SWITCH interface. Its output with selectable slew rate improves electromagnetic compatibility (EMC) behavior. Additionally, each output has its own parallel input or SPI control for pulse-width modulation (PWM) control if desired. The 07XS3200 allows the user to program via the SPI, the fault current trip levels and duration of acceptable lamp inrush. The device has Fail-safe mode to provide fail-safe functionality of the outputs in case of MCU damaged. The 07XS3200 is packaged in a Pb-free power-enhanced 32 pins SOIC package with exposed pad. Features Dual 7.0 m max high-side switch (at 25 C) Operating voltage range of 6.0 to 20 V with sleep current < 5.0 A, extended mode from 4.0 V to 28 V EK SUFFIX PB-FREE 8.0 MHz 16-bit 3.3 V and 5.0 V SPI control and status reporting with daisy 98ASA00368D 32-PIN EXPOSED PAD SOIC chain capability PWM module using external clock or calibratable internal oscillator with programmable outputs delay management Smart overcurrent shutdown compliant to huge inrush current, severe short- Applications circuit, overtemperature protections with time limited auto-retry, and Fail-safe Low-voltage automotive lighting mode, in case of MCU damage Halogen bulbs Output OFF or ON open load detection compliant to bulbs or LEDs and short Incandescent bulbs to battery detection. Analog current feedback with selectable ratio and board temperature feedback. HID Xenon ballasts Low-voltage industrial lighting V DD V V DD PWR V DD 07XS3200 VPWR VDD I/O FSB GND I/O WAKE SO SI HS1 SCLK SCLK CSB CSB MCU SI SO HS0 LOAD I/O RSTB I/O CLOCK I/O IN0 LOAD IN1 I/O A/D CSNS FSI GND Figure 1. 07XS3200 simplified application diagram * This document contains certain information on a new product. Specifications and information herein are subject to change without notice. 2016 NXP B.V.Table of contents 1 Orderable parts 4 2 Internal block diagram . 5 3 Pin connections 6 3.1 Pinout diagram . 6 3.2 Pin definitions 6 4 Electrical characteristics 8 4.1 Maximum ratings . 8 4.2 Static electrical characteristics 10 4.3 Dynamic electrical characteristics . 14 4.4 Timing diagrams . 18 5 Functional description 21 5.1 Introduction . 21 5.2 Functional pin description 21 5.2.1Output current monitoring (CSNS) . 21 5.2.2Direct inputs (IN0, IN1) 21 5.2.3Fault status (FSB) . 21 5.2.4Wake (WAKE) 21 5.2.5PWM Clock (CLOCK) . 21 5.2.6Reset (RSTB) . 21 5.2.7Chip select (CSB) 22 5.2.8Serial clock (SCLK) 22 5.2.9Serial input (SI) 22 5.2.10Digital drain voltage (VDD) 22 5.2.11Ground (GND) . 22 5.2.12Positive power supply (VPWR) 22 5.2.13Serial output (SO) . 22 5.2.14High-side outputs (HS0, HS1) . 22 5.2.15Fail-safe input (FSI) . 22 5.3 Functional internal block description . 23 5.3.1 Power supply 23 5.3.2 High-side switches: HS0HS1 23 6 Functional device operation 24 6.1 SPI protocol description . 24 6.2 Operational modes . 24 6.2.1 Sleep mode . 25 6.2.2 Normal mode 26 6.2.3 Fail-safe mode . 27 6.2.4 Normal and fail-safe mode transitions . 28 6.2.5 Fault mode . 28 6.2.6 Start-up sequence 28 6.3 Protection and diagnostic features . 29 6.3.1 Protections . 29 6.3.2 Auto-retry . 31 6.3.3 Diagnostic 31 6.3.4 Open load faults . 31 6.3.5 Active clamp on VPWR 32 6.3.6 Reverse battery on VPWR . 32 6.3.7 Ground disconnect protection . 32 07XS3200 2 NXP Semiconductors