INTEGRATED CIRCUITS 80C552/83C552 Single-chip 8-bit microcontroller with 10-bit A/D, capture/compare timer, high-speed outputs, PWM Product data 2002 Sep 03 Supersedes data of 1998 Aug 13 Philips Semiconductors Product data Single-chip 8-bit microcontroller with 10-bit A/D, 80C552/83C552 capture/compare timer, high-speed outputs, PWM FEATURES 80C51 central processing unit 8k 8 ROM expandable externally to 64 kbytes ROM code protection An additional 16-bit timer/counter coupled to four capture registers and three compare registers Two standard 16-bit timer/counters 256 8 RAM, expandable externally to 64 kbytes Capable of producing eight synchronized, timed outputs DESCRIPTION A 10-bit ADC with eight multiplexed analog inputs The 80C552/83C552 (hereafter generically referred to as 8XC552) Two 8-bit resolution, pulse width modulation outputs Single-Chip 8-Bit Microcontroller is manufactured in an advanced CMOS process and is a derivative of the 80C51 microcontroller Five 8-bit I/O ports plus one 8-bit input port shared with analog family. The 8XC552 has the same instruction set as the 80C51. inputs Three versions of the derivative exist: 2 I C-bus serial I/O port with byte oriented master and slave 83C5528 kbytes mask programmable ROM functions 80C552ROMless version of the 83C552 Full-duplex UART compatible with the standard 80C51 87C5528 kbytes EPROM (described in a separate chapter) On-chip watchdog timer Three speed ranges: The 8XC552 contains a non-volatile 8k 8 read-only program memory (83C552), a volatile 256 8 read/write data memory, five 3.5 to 16 MHz 8-bit I/O ports, one 8-bit input port, two 16-bit timer/event counters 3.5 to 24 MHz (ROM, ROMless only) (identical to the timers of the 80C51), an additional 16-bit timer Three operating ambient temperature ranges: coupled to capture and compare latches, a 15-source, P83C552xBx: 0 C to +70 C two-priority-level, nested interrupt structure, an 8-input ADC, a dual DAC pulse width modulated interface, two serial interfaces (UART P83C552xFx: 40 C to +85 C 2 and I C-bus), a watchdog timer and on-chip oscillator and timing (XTAL frequency max. 24 MHz) circuits. For systems that require extra capability, the 8XC552 can P83C552xHx: 40 C to +125 C be expanded using standard TTL compatible memories and logic. (XTAL frequency max. 16 MHz) In addition, the 8XC552 has two software selectable modes of power reductionidle mode and power-down mode. The idle mode freezes the CPU while allowing the RAM, timers, serial ports, and LOGIC SYMBOL interrupt system to continue functioning. The power-down mode V SS saves the RAM contents but freezes the oscillator, causing all other V DD chip functions to be inoperative. XTAL1 XTAL2 The device also functions as an arithmetic processor having EA LOW ORDER facilities for both binary and BCD arithmetic plus bit-handling ALE ADDRESS AND PSEN DATA BUS capabilities. The instruction set consists of over 100 instructions: 49 AV SS one-byte, 45 two-byte, and 17 three-byte. With a 16 MHz (24 MHz) AV DD AVref+ crystal, 58% of the instructions are executed in 0.75 s (0.5 s) and AVref 40% in 1.5 s (1 s). Multiply and divide instructions require 3 s CT0I STADC CT1I (2 s). PWM0 CT2I PWM1 CT3I T2 RT2 SCL ADC0-7 SDA HIGH ORDER ADDRESS AND DATA BUS CMSR0-5 RxD/DATA TxD/CLOCK INT0 INT1 CMT0 T0 CMT1 T1 WR RST RD EW SU01691 2002 Sep 03 2 853-1467 28849 PORT 4 PORT 5 PORT 3 PORT 2 PORT 1 PORT 0