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Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.74VHC4040 12-Stage Binary Counter May 2007 74VHC4040 tm 12-Stage Binary Counter Features General Description High speed f = 210MHz at V = 5V The VHC4040 is an advanced high-speed CMOS device MAX CC fabricated with silicon gate CMOS technology. It Low power dissipation: I = 4A (Max.) at T = 25C CC A achieves the high-speed operation similar to equivalent High noise immunity: V = V = 28% V (Min.) NIH NIL CC Bipolar Schottky TTL while maintaining the CMOS low Power down protection is provided on all inputs power dissipation. The VHC4040 is a 12-stage counter Wide operating voltage range: V (Opr.) = 2V 5.5V CC which increments on the negative edge of the input clock Low noise: V = 0.8V (Max.) and all outputs are reset to a low level by applying a OLP logical high on the reset input. An input protection circuit Pin and function compatible with 74HC4040 insures that 0V to 7V can be applied to the inputs without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruc- tion due to mismatched supply and input voltages. Ordering Information Package Order Number Number Package Description 74VHC4040M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74VHC4040MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter X to the ordering number. Connection Diagram Pin Descriptions Pin Names Description Q Q Flip-Flop Outputs 0 11 Negative Edged Triggered Clock CP MR Master Reset 1993 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC4040 Rev. 1.3