3.3 V/5 VECL 2Input Differential AND/NAND MC10EP05, MC100EP05 Description The MC10/100EP05 is a 2-input differential AND/NAND gate. The www.onsemi.com device is functionally equivalent to the EL05 and LVEL05 devices. With AC performance much faster than the LVEL05 device, the EP05 is ideal for applications requiring the fastest AC performance 8 8 available. 1 1 The 100 Series contains temperature compensation. SOIC8NB TSSOP8 D SUFFIX DT SUFFIX Features CASE CASE 220 ps Typical Propagation Delay 75107 948R02 Maximum Frequency > 3 GHz Typical MARKING DIAGRAMS* PECL Mode Operating Range: V = 3.0 V to 5.5 V with V = 0 V CC EE 8 NECL Mode Operating Range: HEP05 ALYW V = 0 V with V = 3.0 V to 5.5 V CC EE Open Input Default State 1 Safety Clamp on Inputs 8 8 Q Output Will Default LOW with Inputs Open or at V EE KEP05 These Devices are Pb-Free, Halogen Free and are RoHS Compliant KP05 ALYW ALYW 1 1 H = MC10 K = MC100 A = Assembly Location L = Wafer Lot Y = Year W = Work Week = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping SOIC8NB 98 Units / MC10EP05DG (Pb-Free) Tube SOIC8NB 2500 / MC10EP05DR2G (Pb-Free) Tape & Reel SOIC8NB 98 Units / MC100EP05DG (Pb-Free) Tube TSSOP8 100 Units / MC100EP05DTG (Pb-Free) Tube 2500 / TSSOP8 MC100EP05DTR2G (Pb-Free) Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifica- tions Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: April, 2021 Rev. 11 MC10EP05/DMC10EP05, MC100EP05 Table 1. PIN DESCRIPTION 1 8 Pin Function D V 0 CC D0*, D1*, D0**, D1** ECL Data Inputs Q, Q ECL Data Outputs V Positive Supply D 2 7 Q CC 0 V Negative Supply EE * Pins will default LOW when left open. ** Pins will default to V /2when left open. CC 6 D 3 Q 1 Table 2. TRUTH TABLE D0 D1 D0 D1 Q Q L L H H L H D45 V 1 EE L H H L L H H L L H L H H H L L H L Figure 1. 8-Lead Pinout (Top View) and Logic Diagram Table 3. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k Internal Input Pullup Resistor 37.5 k ESD Protection Human Body Model > 4 kV Machine Model > 200 V Charged Device Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC8NB Level 1 TSSOP8 Level 3 Flammability Rating Oxygen Index: 28 to 34 UL 94 V0 0.125 in Transistor Count 137 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2