5 V ECL 4 Divider MC10EL33, MC100EL33 Description The MC10EL/100EL33 is an integrated 4 divider. The differential clock inputs and the V allow a differential, single-ended or AC coupled BB interface to the device. The V pin, an internally generated voltage BB www.onsemi.com supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference BB voltage. V may also rebias AC coupled inputs. When used, decouple BB V and V via a 0.01 F capacitor and limit current sourcing or sinking BB CC 8 to 0.5 mA. When not used, V should be left open. BB 1 The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state the reset allows SOIC8 NB for the synchronization of multiple EL33s in a system. D SUFFIX The 100 Series contains temperature compensation. CASE 75107 Features MARKING DIAGRAM 650 ps Propagation Delay 4.0 GHz Toggle Frequency 8 ESD Protection: HEL33 > 1 kV Human Body Model ALYW > 100 V Machine Model 1 PECL Mode Operating Range: V = 4.2 V to 5.7 V with V = 0 V CC EE NECL Mode Operating Range: V = 0 V with V = 4.2 V to 5.7 V CC EE 8 Internal Input Pulldown Resistors on CLK(s) and R. KEL33 Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test ALYW Moisture Sensitivity: Level 1 for SOIC8 NB 1 For Additional Information, see Application Note AND8003/D H = MC10 Flammability Rating: UL 94 V0 0.125 in, K = MC100 Oxygen Index: 28 to 34 A = Assembly Location Transistor Count = 95 Devices L = Wafer Lot Y = Year These Devices are Pb-Free, Halogen Free and are RoHS Compliant W = Work Week = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping MC10EL33DG SOIC8 98 Units / Tube (Pb-Free) SOIC8 98 Units / Tube MC100EL33DG (Pb-Free) Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: April, 2021 Rev. 12 MC10EL33/DMC10EL33, MC100EL33 Table 1. PIN DESCRIPTION Reset 1 8 V CC Pin Function CLK, CLK ECL Clock Inputs* R Reset ECL Asynch Reset* CLK 2 7 Q Q, Q ECL Data Outputs V Reference Voltage Output BB 4 V Positive Supply CC V Negative Supply EE CLK 3 6 Q *Pins will default low when left open. V 4 5 V BB EE Figure 1. Logic Diagram and Pinout Assignment Table 2. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Mode Power Supply V = 0 V 8 V CC EE V NECL Mode Power Supply V = 0 V 8 V EE CC V PECL Mode Input Voltage V = 0 V V V 6 V I EE I CC NECL Mode Input Voltage V = 0 V V V 6 CC I EE I Output Current Continuous 50 mA out Surge 100 I V Sink/Source 0.5 mA BB BB T Operating Temperature Range 40 to +85 C A T Storage Temperature Range 65 to +150 C stg Thermal Resistance (Junction-to-Ambient) 0 lfpm SOIC8 NB 190 C/W JA 500 lfpm SOIC8 NB 130 Thermal Resistance (Junction-to-Case) Standard Board SOIC8 NB 41 to 44 C/W JC T Wave Solder (Pb-Free) < 2 to 3 sec 260C 265 C sol Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2