MC74ACT564 Octal D-Type Flip-Flop with 3-State Outputs The MC74ACT564 is a highspeed, low power octal flipflop with a buffered common Clock (CP) and a buffered common Output Enable (OE). www.onsemi.com The information presented to the D inputs is stored in the flipflops on the LOWtoHIGH Clock (CP) transition. The MC74ACT564 device is functionally indentical to the MC74ACT574, but with inverted outputs. SOIC20W DW SUFFIX Features CASE 751D 1 Inputs and Outputs on the Opposite Sides of the Package Allowing Easy Interface with Microprocessors Useful as Input or Output Port for Microprocessor ORDERING INFORMATION Functionally Indentical to the MC74ACT574 but with Inverted See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Outputs 3State Outputs for BusOriented Applications Outputs Source/Sink 24 mA DEVICE MARKING INFORMATION TTL Compatible Inputs See general marking information in the device marking section on page 5 of this data sheet. These are PbFree Devices V O O O O O O O O CP CC 0 1 2 3 4 5 6 7 20 19 18 17 16 15 14 13 12 11 1 2 345 67 9 8 10 OE D D D D D D D D GND 0 1 2 3 4 5 6 7 Figure 1. Pinout: 20Lead Packages Conductors (Top View) D D D D D D D D 0 1 2 3 4 5 6 7 CP PIN ASSIGNMENT OE PIN FUNCTION O O O O O O O O 0 1 2 3 4 5 6 7 D D Data Inputs 0 7 CP Clock Pulse Input OE 3State Output Enable Input Figure 2. Logic Symbol O O 3State Outputs 0 7 Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: March, 2015 Rev. 4 MC74ACT564/DMC74ACT564 D D D D D D D D 0 1 2 3 4 5 6 7 CP CD CD CD CD CD CD CD CD Q Q Q Q Q Q Q Q OE O O O O O O O O 0 1 2 3 4 5 6 7 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 3. Logic Diagram FUNCTION TABLE Inputs Internal Outputs Function OE CP D Q O H H L NC Z Hold H HH NC Z Hold H LH Z Load H HL Z Load L LH H Data Available L HL L Data Available L HL NC NC No Change in Data L H H NC NC No Change in Data H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance = LOWtoHIGH Transition NC = No Change FUNCTIONAL DESCRIPTION meet the setup and hold times requirements on the LOWtoHIGH Clock (CP) transition. With the Output The MC74ACT564 consists of eight edgetriggered Enable (OE) LOW, the contents of the eight flipflops are flipflops with individual Dtype inputs and 3state available at the outputs. When OE is HIGH, the outputs go complementary outputs. The buffered clock and buffered to the high impedance state. Operation of the OE input does Output Enable are common to all flipflops. The eight not affect the state of the flipflops. flipflops will store the state of their individual D inputs that www.onsemi.com 2